Commit Graph

12026 Commits

Author SHA1 Message Date
Antonio Borneo fcb40f49b1 The openocd-0.12.0-rc3 release candidate
Change-Id: Id7ddf232593e1aa7cb36f2b30fe832ebf79c1535
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-20 13:50:45 +03:00
Antonio Borneo 77c281d2df cortex_m: handle armv8m cores without security extension
Cores armv8m, e.g. Cortex-M33, can be instantiated without the
optional Security Extension.
In this case, the secure registers are not present and when GDB
try accessing them it triggers a set of errors.

For armv8m cores without security extension, don't provide to GDB
the description of the secure registers.

Change-Id: I254478a4cf883e85b786df3f62c726b2f40d88d9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-18 21:52:41 +00:00
Antonio Borneo c913e4d5a6 jtag: fix build with configure --enable-verbose
With flag --enable-verbose, configure enables compiling some
conditional code that with new gcc triggers an error:
	error: '%04x' directive output may be truncated writing
	between 4 and 8 bytes into a region of size 5
	[-Werror=format-truncation=]

Extend the buffer to contain the full 8 bytes of %04x on a 'int'
and change the limit in snprintf.
Skip the intermediate buffer 's[4]'.
Align the code to the coding style.

Change-Id: Ifc8a6e4686555578a7355a1f6049471fd5e31913
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Karl Hammar <karl@aspodata.se>
Reported-by: Tommy Murphy <tommy_murphy@hotmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/376/
Reviewed-on: https://review.openocd.org/c/openocd/+/7403
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-18 21:50:17 +00:00
Dan Stahlke 77c7abe4e7 at91samd: wait for nvm ready
Flashing a SAMD21J17D was failing during NVM erase.  The samd21
datasheet specifies that one cause of error conditions is executing an
NVM command while the previous command is still running.  The solution
is to wait for INTFLAG.READY after a command is issued.

SAMD21J17A was not exhibiting this problem.  Perhaps the later silicon
revision has slower NVM erase times.

Signed-off-by: Dan Stahlke <dan@stahlke.org>
Change-Id: I19745dae4d3fc6e3a7611dcac628e067cb41e0f0
Reviewed-on: https://review.openocd.org/c/openocd/+/7391
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-17 09:33:40 +00:00
Antonio Borneo 0a829efda5 driver: vdebug: fix mode of cmd 'vdebug mem_path'
The command 'vdebug mem_path' is reported in the documentation as
'{Config Command}', but the code sets mode = COMMAND_ANY.
The code of the commands sets some value that is only used during
the init phase, so the documentation is correct.

Change mode of command 'vdebug mem_path' to COMMAND_CONFIG.

Change-Id: Icb940fe382cbc75015273b35dcc8a88fc2a7d0ac
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7395
Tested-by: jenkins
Reviewed-by: Jacek Wuwer <jacekmw8@gmail.com>
2022-12-17 09:33:06 +00:00
Antonio Borneo 2b6fe8f1ab target: fix assert in 'monitor profile' on constant PC
When target is stopped in WFI/WFE or is in an infinite loop, the
sampled PC will always return the same value.
Command 'profile' requires that distance between min and max PC
should be at least 2, which is not the case for constant PC, and
incorrectly enforces the check through as assert().

Move the code that reads the optional parameters 'start' and 'end'
and check the gap 'end - start' before running the profile.
For self-computed min and max, increase max (or decrease min) to
match the required constraint.
Drop the assert().

Change-Id: I2be8df8568ce8c889923888c492e4f7ce354b16b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/370/
Reviewed-on: https://review.openocd.org/c/openocd/+/7400
Tested-by: jenkins
2022-12-17 09:32:34 +00:00
Antonio Borneo a51ac964c6 target: fix unsigned computation in 'monitor profile'
The implementation of command 'monitor profile' has few
issues:
- the address_space is a signed int, so cannot wrap-around on
  space over INT_MAX;
- max address is incremented without check for overflow;
- assert() used on errors instead of returning error codes;
- only handles 32 bits PC;
- output file created and left empty on error.

This patch fixes the first two issues, as a wider fix would be too
invasive and should be postponed in a following series.

Change-Id: Id8ead3f6db0fd5730682a0d1638f11836d06a632
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/370/
Reviewed-on: https://review.openocd.org/c/openocd/+/7394
Tested-by: jenkins
2022-12-17 09:32:09 +00:00
Antonio Borneo a6b0221952 target: cortex_a: fix clang error core.CallAndMessage
Clang complains about the variable 'orig_dfsr' that can be used
uninitialized both in cortex_a_read_cpu_memory() and in
cortex_a_write_cpu_memory().

The issue is caused by an incorrect error path that used to jump
through 'goto out'. The code after the label 'out' is specific to
handle the case of an error during memory R/W; it is incorrect to
jump there to handle an error during the initialization that
precedes the memory R/W.

Replace the 'goto out' with 'return retval'.
Remove the label 'out' that is now unused.

Change-Id: Ib4b140221d1c1b63419de109579bde8b63fc2e8c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7393
Tested-by: jenkins
2022-12-17 09:31:29 +00:00
Antonio Borneo c6fe10de75 arm_adi_v5: fix SIGSEGV due to failing re-examine
Commit 35a503b08d ("arm_adi_v5: add ap refcount and add get/put
around ap use") modifies the examine functions of mem_ap, cortex_m,
cortex_a and aarch64 by calling dap_put_ap() and then looking again
for the mem-ap and calling dap_get_ap().
This causes an issue if the system is irresponsive and the examine
fails and left the AP pointer to NULL. If the system was already
examined the NULL pointer will cause a SIGSEGV.

Commit b6dad912b8 ("target/cortex_m: prevent segmentation fault
in cortex_m_poll()") proposes a fix for one specific case and only
on cortex_m.

Modify all the examine functions by skipping look-up for the AP if
it was already set in a previous examine; the target's AP is not
supposed to change during runtime.

Remove the partial fix for cortex_m as it is not needed anymore.

Change-Id: I806ec3b1b02fcc76e141c8dd3a65044febbf0a8c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 35a503b08d ("arm_adi_v5: add ap refcount and add get/put around ap use")
Reviewed-on: https://review.openocd.org/c/openocd/+/7392
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-17 09:30:45 +00:00
Nima Palizban 2278878a05 src/target/mips_m4k.c: set missing flag in set_watchpoint
Without the fix, will see "Can not find free FP Comparator" error log

Change-Id: Id0d91cc02b7055e44d27507f9c05ccd48ff49838
Signed-off-by: Nima Palizban <n.palizban@gmail.com>
Fixes: fb43f1ff4e (target: Rework 'set' variable of break-/watchpoints)
Reviewed-on: https://review.openocd.org/c/openocd/+/7389
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-17 09:29:32 +00:00
Karl Palsson 9501b263e0 doc: describe tcl port consistently.
One place described the tcl port as 5555, which was changed in 163bd86071
Reported on IRC.

Change-Id: If740a29443793d6a4d4f8c9db54f0fc8344a6c1c
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: https://review.openocd.org/c/openocd/+/7385
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-03 09:27:27 +00:00
Evgeniy Naydanov 04887d3b68 Fix jim_target_smp for smp rtos target
If multiple targets are specified as -rtos <rtos_type>, the
rtos_update_threads was called only if the last target was specified as
rtos, which is inconsistent with other checks of whether or not smp target
is an rtos one.

Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: Ie52bc6b6c8f841d31b9590fcbc44e985d3cba0eb
Reviewed-on: https://review.openocd.org/c/openocd/+/7244
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-03 09:27:00 +00:00
Koudai Iwahori 4fe3997294 hwthread: Restore current_threadid in hwthread_update_threads
When OpenOCD receives a step-execution command from GDB and the target
is configured as rtos=hwthread, OpenOCD reconstructs the thread-info.
However, OpenOCD does not restore the thread id which is currently
selected by GDB. Due to this issue, OpenOCD sends the information of
wrong thread to GDB after the step execution.
This commit fixes the above issue by adding a code to save/restore the
thread id selected by GDB.

Signed-off-by: Koudai Iwahori <koudai@google.com>
Change-Id: I761a1141c04d48f1290e4f09baa7c7024f86f36a
Reviewed-on: https://review.openocd.org/c/openocd/+/7358
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-03 09:26:29 +00:00
Koudai Iwahori a9d7428535 hwthread: Add register validity check in get_thread_reg_list
When OpenOCD receives 'g' packet (read general registers) from GDB and
target is configured as rtos=hwthread, hwthread_get_thread_reg_list is
called. However, it does not check if the register valid or not. Due to
this issue, OpenOCD returns invalid register values to GDB.
This commit adds a validity check to hwthread_get_thread_reg_list. If
the register is not valid, it tries to read the register from the
target.

Signed-off-by: Koudai Iwahori <koudai@google.com>
Change-Id: Iad6424b62124271ec411b1dfc044b57dfc460280
Reviewed-on: https://review.openocd.org/c/openocd/+/7357
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-03 09:26:04 +00:00
Antonio Borneo 3ea1bfce4f jtag: xds110: fix clang error core.StackAddressEscape
Clang ignores that xds110_swd_write_reg() is always called with
bit SWD_CMD_RNW in 'cmd' set to zero.
It then complains that the local variable 'value' gets passed by
address to xds110_swd_queue_cmd() and in case of 'read request'
such stack address get stored for later use:
	src/jtag/drivers/xds110.c:1363:1: warning: Address of
	 stack memory associated with local variable 'value' is
	 still referred to by the global variable 'xds110' upon
	 returning to the caller. This will be a dangling
	 reference [core.StackAddressEscape]

To both xds110_swd_write_reg() and xds110_swd_read_reg(), add an
assert() to inform Clang about the state of bit SWD_CMD_RNW.

Change-Id: I7687c055ec71424b642e152f478723a930966e3a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7380
Tested-by: jenkins
2022-12-03 09:25:27 +00:00
Antonio Borneo 0f034868f2 flash: lpc2900: fix clang error 'dead assignment'
The variable retval is assigned a value that is never used.
Scan-build reports:
	Although the value stored to 'retval' is used in the
	enclosing expression, the value is never actually read
	from 'retval'.

Drop the dead assignment.

Change-Id: I11588dee748a55d52aa7f35bc1967b7df55af7fc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7379
Tested-by: jenkins
2022-12-03 09:24:59 +00:00
Dolu1990 b337b0cfb4
riscv/run_algorithm : Add support for memory parameters (#773)
* riscv/run_algorithm : Add support for memory parameters

Change-Id: I5045a3843dcd96edb0cf8cc54bbd41969e3260a6
Signed-off-by: Dolu1990 <charles.papon.90@gmail.com>

* riscv/run_algorithm : better parameter handeling

Change-Id: If3da8b83f784ef7b13ca83e98bc629e2219cc632
Signed-off-by: Dolu1990 <charles.papon.90@gmail.com>

* riscv/run_algorithm : Better mem param error reporting

Change-Id: I09f99ca117f7e5373b23cad0f69d9d5b2a77e61d
Signed-off-by: Dolu1990 <charles.papon.90@gmail.com>

Signed-off-by: Dolu1990 <charles.papon.90@gmail.com>
2022-12-02 09:38:40 -08:00
Tim Newsome f7a5f4719d
Merge pull request #772 from riscv/resume_state
target/riscv: Set target->state in riscv013_halt_go()
2022-11-30 10:21:24 -08:00
Tim Newsome 86e84d3f6d target/riscv: Set target->state in riscv013_halt_go()
Then also set it when we resume in examine(), which doesn't use the full
abstractions because not all required data structures are filled out
yet.

Hopefully fixes #749.

Change-Id: I0c6ab16da1f035ca2fbdb9f7be1462d44ddce3a0
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-29 09:24:24 -08:00
Marc Schink 6ea1ccf3e6 flash/nor/stm32lx: Add revision '1, X' for Cat.2 devices
Change-Id: I0ff1e2102175ee952b066b325c9acbcb598b3af7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7378
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-28 22:23:47 +00:00
Rocco Marco Guglielmi 5193f61cf5 tcl: max326xx: fix target scripts for latest version of OpenOCD
Change-Id: Iec5aba3a082f2e25f21d7ca173ed710894b370a4

Signed-off-by: Rocco Marco Guglielmi <roccomarco.guglielmi@gmail.com>
Change-Id: Ia83850e326661c8acb0712a280fdf961258322a4
Reviewed-on: https://review.openocd.org/c/openocd/+/7373
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-28 22:23:30 +00:00
Nick Kraus e345cefabd jtag/drivers/cmsis_dap.c: Fix Length of SWO Baudrate Command
The command should now send the full 5 byte command length, which
includes the command tag (0x19) and the 4-byte baudrate word, instead
of only the last 3 bytes of the baudrate.

Signed-off-by: Nick Kraus <nick@nckraus.com>
Change-Id: Idd6e084efd7492489aa900cdbf08f540944041cb
Reviewed-on: https://review.openocd.org/c/openocd/+/7370
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-28 22:23:03 +00:00
Tim Newsome d6bf022560
Merge pull request #767 from riscv/unavailable
Handle harts becoming unavailable while they're being debugged.
2022-11-25 10:18:12 -08:00
Tim Newsome 2d7dc3f5f5 target/riscv: Fix small riscv013_halt_go() bug
Exit the loop when no harts are running, instead of when at least one
hart has halted.

Change-Id: Ia69b626bf1fee4034bd5ccc800a651bfe0e53685
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-23 13:00:01 -08:00
Tim Newsome 69222be761 target/riscv: RISCV_HALT_BREAKPOINT -> RISCV_HALT_EBREAK
Simple rename to make code slightly more clear.

Change-Id: I959f83164c55de064d902d4e5bcd49333cef5c91
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-23 13:00:01 -08:00
Tim Newsome bf15b00315 target/riscv: Set correct target->state in riscv013_halt_go()
It used to set all states to halted, but that's not right for harts that
are now unavailable. (It might be possible to call poll() at the right
time instead of duplicating some of its code, but I didn't see an easy
way to do that. The real requirement is that target->state is set to
TARGET_UNAVAILABLE before TARGET_EVENT_HALTED is is sent in
halt_finish(), because that's what triggers hwthread_update_threads(),
which must know about unavailable harts so they can be hidden from gdb.

Change-Id: I0a0bbdd4ec9ff8c9898e04045b84e1d2512c9336
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-23 12:59:58 -08:00
Tim Newsome e69735db0b gdb_server: Operate on available targets.
When SMP is enabled, gdb will always use the first target in the SMP
group. That doesn't work when that first target is unavailable, but
others in the SMP group are still available.

For cases where gdb expects an operation to affect the entire group (run
control, memory access), find the first available target in an SMP group
and use that.

Change-Id: I4bed600da3ac0fdfe4287d8fdd090a58452db501
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:50 -08:00
Tim Newsome b1f3a75819 target/riscv: Don't resume unavailable harts.
Change-Id: I30a2e9ec6c1b99fb92ab1a160ddb63682167c6d8
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:50 -08:00
Tim Newsome d3bffe3d86 target/riscv: Share single-target and SMP resume code.
Change-Id: I416d8cc4c8c5ca0337c1f7e392b6b4fa3d75757f
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:50 -08:00
Tim Newsome 5832b983f5 rtos/hwthread: Hide unavailable targets from thread list.
Change-Id: I53c6e2876d9bab70800a0f080e72a2abe0499120
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:50 -08:00
Tim Newsome ad93fda7e8 target/riscv: Make poll() use TARGET_UNAVAILABLE.
Change-Id: I7052dd08581f0ce6a05cd8319e9bec0086296fc3
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:47 -08:00
Tim Newsome e5f9024bb0 target/riscv: Refactor riscv_openocd_poll()
There used to be entirely separate code paths depending on whether we're
in SMP mode or not. Now they're both the same.

Change-Id: I8f46295e4bc005f441af0c03d4f608c53b8a6586
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-21 10:26:21 -08:00
Tim Newsome 5a48975118 target/riscv: Error when hart becomes unavailable during resume
Change-Id: I731e6178b2b08b65206614b0dc2a0d993c149cc3
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-21 10:26:21 -08:00
Tim Newsome cc5e78172a
Merge pull request #769 from riscv/0.11
Revive 0.11 debug spec support
2022-11-21 09:26:38 -08:00
Tim Newsome f1e20767bc target/riscv: 0.11, call handle_halt() after step
This ensures that we populate the register cache and set target->state.
Some RISC-V changes had upset the balance.

Change-Id: I47fbf8ebd8fe39fa5b752212080f87e3b7e6e5e5
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-17 11:41:27 -08:00
Tim Newsome e16d7a5611 target/riscv: Ignore maskmax when reading back tdata1
We don't correctly write it, so we shouldn't expect it to read back the
same value. Fixes hardware breakpoints on mcontrol triggers.

Change-Id: Ie5e445060ec9c8887af933fd8887e57308330f09
2022-11-17 11:41:24 -08:00
Tim Newsome bec0fe2236
target/riscv: Don't always read on DMI batch write (#768)
Indicate to the JTAG driver that it does not need
to read and return the DR register value after scanning the
JTAG chain.

riscv_batch_run(), calls jtag_add_dr_scan() to schedule a
DR scan operation. Eventually, this will result in the JTAG
driver performing a JTAG scan to write to or read from DR.
The decision on whether to write to and/or read from DR
register is determined by the second parameter to
jtag_add_dr_scan(), i.e. a "struct scan_field".
Of particular interest here is if
batch->fields[i]->in_value is not NULL, the JTAG developer
must return the DR value collected from the JTAG  scan
operation.

When creating the DR scan operation instruction with
riscv_batch_add_dmi_write(), batch->fields[i]->in_value points
to a location in batch->data_in buffer,
meaning batch->field[i]->in_value is not NULL, and the JTAG
developer must therefore read and return the DR value collected.
The returning of the DR value is redundant in a write
operation.

This patch set batch->fields[i]->in_value to NULL to indicate
the DR value need not be returned. This allows the JTAG
developer to optimize away any code associated with returning
the DR value.

Normally, the extra work to return the DR value is negligible.
However, in one usecase it introduces significant delays
In this use case a JTAG driver forwards
all JTAG scan to a server on a network. If the server has to
return the DR value, it has to perform the JTAG scan before
replying to the JTAG driver, and only then the JTAG driver
can send the next JTAG scan operation. However, if there is
no need to return the DR value, the server can
acknowledge the JTAG operation request immediately,thus
signalling  to the JTAG driver that it is free to send the next
JTAG scan operation. At the same time of receiving the second
JTAG operation the server will process the original JTAG scan.
This saves time and mitigates network delay. Also, not having
to include the DR value in resulting in smaller reply packet
from server to JTAG driver and save on network traffic.

This doubles download speeds to spike using remote bitbang.

Change-Id: Ibb37c3e32af0cc7006b22b8c4e1f31ed29c21d0f
Signed-off-by: Ooi, Cinly <cinly.ooi@intel.com>
Signed-off-by: Tim Newsome <tim@sifive.com>

Signed-off-by: Ooi, Cinly <cinly.ooi@intel.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Ooi, Cinly <cinly.ooi@intel.com>
2022-11-17 11:34:27 -08:00
Tim Newsome fc210e8689 target/riscv: Ignore debug_execution in 0.11 resume
It's only used to change what callback events are generated, and there
are none anyway. (That's probably a bug, but since 0.11 is so rare I'm
not going to worry about it.)

Fixes #757.

Change-Id: I5b5df3a9bec927fb0368304229533e2875a83f6b
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-17 09:49:28 -08:00
Evgeniy Naydanov 8ae41e86e1
Fix breackpoint_add for rtos swbp (#734)
breakpoint_add should use rtos only if request is done by gdb.

Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: I779d1a905c6a3640869dca162e3cc001919e8f42

Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2022-11-16 11:03:43 -08:00
Tomas Vanek 9d925776b4 target/armv7m: fix feature name of ARMv8M security extension regs
gdb requires this feature to enable stack unwinding of secure/nonsecure
interstate calls and exceptions on an ARMv8M target with
the security extension.

Tested on STM32L5 (Cortex-M33).

Change-Id: Ib09780c011afbc095b352074068597559ad14fcd
Link: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=ae7e2f45aa4798be449f282bbf75ad41e73f055e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7265
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-15 21:39:19 +00:00
Giulio Fieramosca 2e9f04c11a rtos/ThreadX: added check for NULL-named tasks
Thread name loading was not correctly handled if a ThreadX task has a NULL
name.

Signed-off-by: Giulio Fieramosca <giulio@glgprograms.it>
Change-Id: I03071930182bc2585b61ce5d8c67491710883dd6
Reviewed-on: https://review.openocd.org/c/openocd/+/7328
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-15 21:35:12 +00:00
Andreas Bolsch 2bad55bf83 Fix for segfault and some clang reported problems in stmqspi
Change-Id: Id003adb574085cdd603cc13aeb6f2efec73593f1
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7345
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-15 21:34:40 +00:00
Antonio Borneo 1762aa04ce jep106: update to revision JEP106BF.01 Oct 2022
Change-Id: Ia1f19dcce48da997c036ccffa65e76e179de2eb9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7341
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-11-15 21:34:22 +00:00
Simon Smiganovski 0d055602c3 flash/nor/stm32f1x: adjust size of the flash loader buffer
target_run_flash_async_algorithm expects the source_buffer to have
at least 2 words reserved for read and write pointers in addition to the
FIFO buffer. If the size of the data to be flashed is <= 8 bytes then
the flash function will fail with "corrupted fifo read pointer" error.

Ensure the allocated buffer is big enough to hold both FIFO buffer and
read/write pointers.

Change-Id: I09c22eaac517b8cfea8e0b463f5deb6b98afd267
Signed-off-by: Simon Smiganovski <simon.smiganovski@fruitcore.de>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7342
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-15 21:33:53 +00:00
Tomas Vanek 6939187853 target/armv7m: prevent saving and restoring non existent regs
armv7m_start_algorithm() saves register values to arch_info->context.
armv7m_wait_algorithm() restores register values from arch_info->context.
Exclude registers with flag exist = false from both loops.

While on it refactor the register restore: introduce 'struct reg' pointer
and dereference it instead of numerous accesses by a full path
from armv7m pointer.

Change-Id: I1600084db84809ee13bcf8e7828b79f8c9ff9077
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7276
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-15 21:30:07 +00:00
Evgeniy Naydanov dc49ed8ae2
Workaround for fp register access in case fp unit is disabled (#766)
On some boards there is a HW bug: if fp unit is disabled (fs in mstatus
set to 0), accessing any fp register results in a hang (any abstract
command timeouts, untill the board is rebooted).

Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: I0c0d1033889f15dcc326c4078bf9cbb5a8558565

Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2022-11-15 08:52:13 -08:00
Tomas Vanek 1d04ef3e55 tcl/interface: fix raspberrypi2-native.cfg speed coefficient
The speed coefficient for Raspberry Pi 2 was probably calibrated
for a scaled down clock frequency.

To prevent JTAG/SWD overclocking, use the value corresponding
to the 'official' maximum CPU clock.

Change-Id: Iaff58b092198dce6d6552c9d31d6a3ba4aaaa2d5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7305
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
2022-11-15 09:54:06 +00:00
George Voicu 4e077fddad tcl/cpld/xilinx-xcu: fix typo
Fix typo in comments

Signed-off-by: George Voicu <razvanvg@hotmail.com>
Change-Id: Icc2d770e73f896e20dd347de324328030544bdb9
Reviewed-on: https://review.openocd.org/c/openocd/+/7333
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-11 20:24:16 +00:00
Daniel Anselmi d3e79c1eaf pld/virtex2: small doc extension
Change-Id: I174cd702388be04268b38178fbfacb90db452f72
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7303
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-11 20:23:49 +00:00
Antonio Borneo fb23c9c10b rtos: hwthread: fix clang error core.NullDereference
Clang spots a potential NULL pointer dereferencing that is instead
an incorrect use of an array of pointers:

	src/rtos/hwthread.c:254:32: warning: Dereference of null pointer
	  [core.NullDereference]
		(*rtos_reg_list)[j].number = (*reg_list)[i].number;
		                             ^~~~~~~~~~~~~~~~~~~~~
The error has not been spotted before because:
- this function is not called for the first core of the SMP node,
- for the other cores on Cortex-A it still returns valid register
  value for the first 12 ARM registers, then it diverges.

Also Valgrind does not spot any issue at runtime.

Address the array correctly.

While there, use DIV_ROUND_UP() macro for the computation.

Change-Id: Ib87e60e0edfd9671091f5dcfa9aedaf1aed800d1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7337
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-11-11 20:23:13 +00:00