Commit Graph

6202 Commits

Author SHA1 Message Date
Tim Newsome 10518351bb Don't immediately segfault with -rtos on v0.11. 2017-06-20 11:32:42 -07:00
Tim Newsome ccdd26e3ef Comment curious code. 2017-06-20 11:32:42 -07:00
Tim Newsome 927f9d8873 Update list of "threads" when harts are discovered.
This ensures that "info threads" is accurate as soon as gdb connects.
Also print out number of triggers that is discovered in examine().
2017-06-20 11:32:42 -07:00
Tim Newsome 4d264b3579 Put early DEBUG notice of XLEN back. 2017-06-19 08:46:02 -07:00
Tim Newsome 6082f35a55 Update debug_defines. Clarify debug output.
Update debug_defines from the spec, commit 920ec9a690.
Decode dmstatus scans in the debug output.
2017-06-16 14:02:25 -07:00
Tim Newsome fd81f7fcac Fix comment. 2017-06-16 14:02:25 -07:00
Tim Newsome 851849a295 Tell the user about detected harts. 2017-06-16 14:02:25 -07:00
Tim Newsome 3abb347bd9 Tighten up debug output.
Assuming the program allocating code works, we don't need its output.
Only output parts of the debug RAM that are actually doing something.
2017-06-16 14:02:25 -07:00
Tim Newsome ac2da40f74 Fix indentation to match OpenOCD style.
This change is just in the whitespace. There are no code changes.

See http://openocd.org/doc-release/doxygen/stylec.html
2017-06-15 12:44:50 -07:00
Tim Newsome 363a0a2bf2 Merge pull request #64 from riscv/release-fixes
Two fixes from the release branch
2017-06-15 12:43:46 -07:00
Tim Newsome 50a223ef9a Fix print statements to work with 64-bit addresses 2017-06-15 12:24:37 -07:00
Palmer Dabbelt afc9eb6c47 Jump to the RTOS hartid after halting
When I disappeared the polls everywhere I forgot to sanitize the hartid
after halting.  This is an invariant that GDB expects: when you return
from a halt whatever thread is marked as currently selected is the
thread that the next register accesses reference.
2017-06-15 12:16:33 -07:00
Palmer Dabbelt 099a3020d2 Clear abstract errors from register_read_direct 2017-06-15 12:16:24 -07:00
Tim Newsome 503da094e8 Accept 64-bit addresses in CRC requests. 2017-06-15 10:44:37 -07:00
Tim Newsome 64af052911 Fix the build.
Main change is to make riscv_addr_t be unsigned. The rest is mechanical
fixing of types, print statements, and a few signed/unsigned compares.

Smoketest indicates everything is working more or less as before.
2017-06-13 12:33:01 -07:00
Tim Newsome 845c2f6b69 Merge branch 'remotes/openocd/master' into riscv64
Merged 1025be363e

Conflicts:
	src/flash/nor/Makefile.am
	src/rtos/Makefile.am
	src/rtos/rtos.c
	src/target/Makefile.am
	src/target/target.c
	src/target/target_type.h

Doesn't build yet, but I fixed the conflicts that git pointed out.
2017-06-13 11:52:50 -07:00
Tim Newsome 6be600318c Fix dmi_read() indentation; remove \n in LOG_ERROR 2017-06-08 12:31:08 -07:00
Megan Wachs c3b344d1c0 riscv: Move the initialization of the field inside the structure for consistency 2017-06-07 21:06:33 -07:00
Megan Wachs 459b39ec67 riscv: v13 -- dmi_write must still check for the OP result 2017-06-07 21:06:33 -07:00
Tim Newsome 11008baee3 %p already includes 0x (on gcc) 2017-06-06 11:51:15 -07:00
Tim Newsome 83afb93004 Don't leave fd undefined.
When gcc isn't optimizing well, it might not realize that it's not
possible to return fd without initializing it, and then the build fails
due to -Werror.
2017-06-06 11:51:15 -07:00
Paul Fertser 1025be363e flash: nor: ath79: fix build failure due to recent MIPS changes
Change-Id: I7139b0658f048afea2d16216c93e8946356a630d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4151
Tested-by: jenkins
Reviewed-by: Salvador Arroyo <sarroyofdez@yahoo.es>
2017-06-02 20:20:26 +01:00
Tobias Diedrich 6b9d19d367 flash: Add support for Atheros (ath79) SPI interface
Supported SoCs: AR71xx, AR724x, AR91xx, AR93xx, QCA9558

Extended and revised version of my original patch submitted by Dmytro
here: http://openocd.zylin.com/#/c/3390

This driver is using pure SPI mode, so the flash base address is not
used except some flash commands (e.g. "flash program") need it to
distinguish the banks.

Example config with all 3 chip selects:
flash bank flash0 ath79 0 0 0 0 $_TARGETNAME cs0
flash bank flash1 ath79 0x10000000 0 0 0 $_TARGETNAME cs1
flash bank flash2 ath79 0x20000000 0 0 0 $_TARGETNAME cs2

Example usage:
> flash probe flash0
Found flash device 'win w25q128fv' (ID 0x001840ef)
flash 'ath79' found at 0x00000000
> flash probe flash1
No SPI flash found
> flash probe flash2
No SPI flash found
> flash banks
> flash read_bank flash0 /tmp/test.bin 0x00000000 0x1000
reading 4096 bytes from flash @0x00000000
wrote 4096 bytes to file /tmp/test.bin from flash bank 0 at offset
0x00000000 in 28.688066s (0.139 KiB/s)

Change-Id: I5feb697722c07e83a9c1b361a9db7b06bc699aa8
Signed-off-by: Tobias Diedrich <ranma+openocd@tdiedrich.de>
Reviewed-on: http://openocd.zylin.com/3612
Tested-by: jenkins
Reviewed-by: Dmytro <dioptimizer@hotmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-31 08:18:29 +01:00
Grzegorz Kostka 83c67b7ac7 imx_gpio: add mmap based jtag interface for IMX processors
For some targets (like nrf51) sysfs driver is too slow. This
patch implements memory maped driver for IMX processors.
Mostly based on bcm2835gpio. Tested on imx6ul CPU. However, it should
work on any NXP IMX CPU.

Change-Id: Idace4c98181c6e9c64dd158bfa52631204b5c4a7
Signed-off-by: Grzegorz Kostka <kostka.grzegorz@gmail.com>
Reviewed-on: http://openocd.zylin.com/4106
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-31 08:16:17 +01:00
Palmer Dabbelt 51ab5a0c8b Return 5 (SIGBREAK) not 2 (SIGINT) after a step
GDB seems to just go off the rails if I return a SIGINT.
2017-05-25 18:31:58 -07:00
Palmer Dabbelt f0969e7c71 Pass EVENT_RESUMED in the RTOS
I missed this event.  It appears to do nothing.
2017-05-25 13:14:31 -07:00
Palmer Dabbelt ab77c5d792 Invalidate the register cache when rtos_hartid==-1
This means I don't know what hart to look at, so I might as well
invalidate the register cache.  Without this, you might get stale
registers the first time you ask for them.
2017-05-25 13:14:31 -07:00
Palmer Dabbelt faa6123e36 Invalidate the register cache on step, resume, reset
I thought OpenOCD did this, but it looks like that doesn't happen when
runningi in RTOS mode.  With this I can get to the end of most of the
RTOS tests, but they SIGINT instead of exiting.
2017-05-25 13:14:31 -07:00
Megan Wachs e12f5575ef riscv-v11: Don't perform unexpected operation in cache_write 2017-05-22 22:02:01 -07:00
Palmer Dabbelt c431c0eb25 Check for abstractcs.busy, not just CMDERR_BUSY
This fixes a race condition when reading/writing memory.
2017-05-15 17:40:28 -07:00
Palmer Dabbelt a8cf04b839 Go back to 32-word read/write buffers
The larger buffers are really slow on Spike.
2017-05-15 16:57:25 -07:00
Palmer Dabbelt e31761df64 Don't re-read registers after they're written
This was just a sanity check.
2017-05-15 16:57:08 -07:00
Palmer Dabbelt 9d308db2bc Print out the actual CSR that's read 2017-05-15 16:56:50 -07:00
Palmer Dabbelt 8252b9d36c Build fixes 2017-05-15 13:39:58 -07:00
Megan Wachs af6e04d5c0 riscv: Remove some compile warnings 2017-05-15 13:36:05 -07:00
Forest Crossman f6449a7cba jtag/drivers: Add Cypress KitProg driver
This patch adds a driver for the SWD-only Cypress KitProg
programmer/debugger.

Change-Id: I3a9a8011a762781d560ebb305597e782a4f9a8e5
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/3221
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-05-12 10:08:43 +01:00
Palmer Dabbelt bcf2a16b0d Shim back in some old interfaces for now 2017-05-11 10:41:13 -07:00
Palmer Dabbelt 563f6acc3c Allow all harts to be reset 2017-05-09 13:33:20 -07:00
Juha Niskanen 753cf12700 stm32l4: support flashing L45x/46x devices
Also fixes incorrect comment about MSI range.

Change-Id: If1339a00e50db44195dfcd5c767ba3f5d9035451
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:07:41 +01:00
Salvador Arroyo f22b89d9fb mips32, use scan32 function for reading impcode/idcode.
There is no need to implement scan code in functions
mips_ejtag_get_idcode/impcode(), use mips_ejtag_drscan_32().
Impcode/idcode saved in ejtag.info.
Reorder the code in the callers of this functions.

Change-Id: Ia829c783a0b24c6a65cade736113fa6f67b0a170
Signed-off-by: Salvador Arroyo <salvador@telecable.es>
Reviewed-on: http://openocd.zylin.com/4003
Tested-by: jenkins
Reviewed-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:05:58 +01:00
Salvador Arroyo b702b16dc2 mips32: add micromips breakpoints support
Breakpoint setting based on length (kind) only.
Added 16bit aligned 32bit software breakpoints
support and same filtering before setting
breakpoint.
Set the required isa bit in hardware breakpoints.
Drop the isa bit in software breakpoints.

Change-Id: I7020f27be16015194b76f385d9b8e5af496d0dfc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4124
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:05:26 +01:00
Salvador Arroyo 4831ce4433 mips32: add micromips isa handling
Read and save configuration registers, up to 4.
Config3 holds the micromips implementation info.
Added isa implementation info to mips32_common.
Added isa filter to avoid common mistakes, but only
if one isa mode is implemented.
When resuming the isa requested is set if more than
one isa mode is implemented.

Change-Id: I1d6526c5525bffac8d75e031b842b2edc6310e28
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4123
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:04:56 +01:00
Salvador Arroyo f5151b6d46 mips32, convert miniprograms with code definition
Needed to run in micromips mode. Seems that if an isa
is supported in debug mode it also supported in kernel
mode. The contrary is not true.

Change-Id: I1feb8e2c376f4db97089f05c20bc0cd177208fb3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4033
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:58 +01:00
Salvador Arroyo 2279c23cde mips32, add support for micromips in debug mode
Micromips is 16bit oriented, branch and jumps are
16 bit based. The upper half 16bits of a 32bit instruction
with the major opcode, must go first in the instruction
stream, hence the SWAP16 macro and swap16 array function,
needed if the code is written as 32 bit word in little endian
cores. Endianess info added to ejtag_iinfo. Pointer to
ejtag_info and isa field added to pracc context.
MIPS32 code are renamed to MIPS32_ISA_...
To select the isa, the new code has an additional isa parameter
(1 for micromips, 0 for mips32).
In JR instruction the isa bit must be set to execute
micromips code.
The suffix u is added to the OP codes to avoid signed/unsigned
comparison errors and to make sure the right shift is
performed logically.
The isa in debug mode is updated in the poll function.
Code for miniprograms, in kernel mode, need to be converted.
CFI code only for mips32.

Change-Id: I79a8b637d49b0e2d92b6dd5eb5aa8aa0520bf938
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4032
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:28 +01:00
Salvador Arroyo 6012a87d44 mips32, add microMips instruction subset
Only reencoded MIPS32 instructions. Added some instructions
for crc code. Micromips isa in debug mode is only needed for
pic32mm cores. Pic32mz seems that only works with MIPS32
isa when in debug mode.

Change-Id: I07059e153a7000ea9204f20b6b37edf6a7623455
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4022
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:00:46 +01:00
Salvador Arroyo e320588117 mips32, add option to avoid check in last instruction
This option is needed, for example, when exiting
debug mode in bmips targets. The last instruction
is a NOP, not a DERET. When working in async mode
this check is not done, mips32_pracc_queue_exec() pass
the parameter to mips32_pracc_exec() and never use it.

Change-Id: I4c7ed4feb1588b62e2645b955b501b6671113b36
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4021
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:00:09 +01:00
Salvador Arroyo 1392c27cf9 mips32, add realloc code
If max_code is reached realloc memory. If fails to realloc
the error is propagated and every call to pracc_add() returns
immediately. The exec function logs the error.

Change-Id: Idd4ed9d9b8b19b7d6842d0bc5ebb05f943726705
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4020
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 17:59:15 +01:00
Salvador Arroyo c8b31aaa15 mips32, change in pracc_list for dynamic allocation
pracc_list points to an array with code in the lower half
and addr in the upper half. Change it to a struct with
an instruction field and an address field.
Requiered to make reallocation easier.
As a side effect the code is less quirky.

Change-Id: Ibf904a33a2f35a7f69284d2a2114f4b4ae79219f
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4019
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 17:57:30 +01:00
Megan Wachs fa8d7adf33 Avoid accessing null target->reg_cache
GDB might request registers even if target was not successfully initialized.
2017-05-05 11:05:28 -07:00
Matthias Welwarsky 3414daed26 Fix compile failure on MacOSX
MacOSX tool chain defines __unused in "sys/cdefs.h", causing a collision.
Remove the local define to avoid polluting the compilers internal 
symbol namespace.

Change-Id: I16370c4518e6aeec482dd689e7db80628f846ee3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4118
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2017-05-02 16:43:20 +01:00
Megan Wachs 95a2eb157a riscv-013: more consistent parens 2017-05-01 09:42:11 -07:00
Megan Wachs 458bb20699 riscv-013: Correct sign extension of address on read_memory for lower bits as well 2017-05-01 09:39:59 -07:00
Megan Wachs 8462750357 riscv-013: Correct sign extension of address on read_memory 2017-05-01 09:37:48 -07:00
Megan Wachs ad1cf13ef4 Correct debugging print in read_memory 2017-05-01 08:35:10 -07:00
Palmer Dabbelt 16de5044d4 Fix an assertion when reading from 0 2017-05-01 08:33:01 -07:00
Palmer Dabbelt ba3a56937b Correct previous hart caching logic 2017-05-01 08:32:43 -07:00
Palmer Dabbelt 1ec607c726 Clean up unused read_memory code 2017-04-27 12:56:01 -07:00
Palmer Dabbelt 4116b97d6e Correct an off-by-one in argument parsing 2017-04-26 15:17:11 -07:00
Palmer Dabbelt 17d04aded3 Keep calling the old poll on v0.11 targets
This is another thing that should be fixed correctly.  Essentially this
just uses the old codepath, which works for v0.11.
2017-04-26 15:16:39 -07:00
Palmer Dabbelt 9d4df3420c Initialize all registers in examine
I'm not sure why this is necessary, but for some reason GDB is asking
for registers before OpenOCD thinks there's been a halt.  This is really
just a workaround, but I need to refactor the v0.11 stuff anyway so I
don't want to figure it out.
2017-04-26 15:09:24 -07:00
Megan Wachs da66be0161 riscv: Fix some blocking compile warnings 2017-04-26 10:23:53 -07:00
Megan Wachs 1ab5d7b497 fespi: Allow the ctrl_base address specified as a parameter 2017-04-26 09:10:49 -07:00
Palmer Dabbelt 8dea2908b7 Add 64-bit and multihart support
This is a major rewrite of the RISC-V v0.13 OpenOCD port.  This
shouldn't have any meaningful effect on the v0.11 support, but it does
add generic versions of many functions that will allow me to later
refactor the v0.11 support so it's easier to maintain both ports.  This
started as an emergency feature branch and went on for a long time, so
it's all been squashed down into one commit so there isn't a big set of
broken commits lying around.  The changes are:

 * You can pass "-rtos riscv" to the target in OpenOCD's configuration
   file, which enables multi-hart mode.  This uses OpenOCD's RTOS
   support to control all the harts from the debug module using commands
   like "info threads" in GDB.  This support is still expermental.

 * There is support for RV64I, but due to OpenOCD limitations we only
   support 32-bit physical addresses.  I hope to remedy this by rebasing
   onto the latest OpenOCD release, which I've heard should fix this.

 * This matches the latest draft version of the RISC-V debug spec, as of
   April 26th.  This version fixes a number of spec bugs and should be
   close to the final debug spec.
2017-04-26 09:10:49 -07:00
Salvador Arroyo cb317eabf2 mips32, write handler code in a more compact way
Less code and probably cleaner.
Don't check if it is ever ERROR_OK.

Change-Id: I1045b58fd4542ec24430332f49679364ae97b1dc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4018
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:03:20 +01:00
Salvador Arroyo bff6205bab mips32, implement assembler li instruction
Implement it as a function, the code was already in. Added optimize
option.

Change-Id: Ib9ad3f00d6c4f0b91c4e4960a50ec8d102f4e333
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4017
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:02:14 +01:00
Salvador Arroyo 9bdc3bf0a8 mips32, in wait_for_pracc_rw() use ejtag_info->pa_ctrl
Makes code shorter
In fasdata transfer fuction declare variables locally.
Avoid cast.

Change-Id: I0367b66339560fc20521a0598488e7ff9076808e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:00:52 +01:00
Salvador Arroyo 5fdcbbdb25 mips32, mips32_pracc_finish() queued only
In most of the cases there is no need to request execution,
the check for a new pracc access already does it.
Requesting execution if not needed makes execution slower and
code larger due the additional checks.
Reduce code in fasdata transfer function.
Call for execution when exiting debug.

Change-Id: I3b45f6d1f62da5fad3e3db84f82a9299b16e1bd9
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4010
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:59:44 +01:00
Salvador Arroyo 09ebc1afad mips32, drop unnecessary code in mips32_pracc.c
Struct mips32_pracc_context no more in use.
In current code cp0 reg/sel do not requires special handling.
In sync mode ctx.store_count not used, drop check.
In fasdata transfer function use mips32_pracc_read_ctrl_addr()
to reduce code.

Change-Id: Ibd4cfa5a44ebc106ed0db042f4e54a2e0b3d43cb
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4007
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:58:47 +01:00
Salvador Arroyo 7ccd53bdde mips32, homogenize code in the scan functions
Change-Id: I32fed3332857737048dd12da94fcaba140acb726
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4006
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:58:00 +01:00
Marc Schink 3421b89c98 server/telnet: Remove exit() call
Change-Id: I8ce99d7d62dfe3cad63cf6bc68f2faf2234e395c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3224
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:56:49 +01:00
Marc Schink b43b95e460 server/server: Remove all exit() calls
With this patch OpenOCD shuts down properly when errors occur in the
server instead of just calling exit().

Change-Id: I2ae1a6153dafc88667951cab9152941cb487be85
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3223
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2017-04-25 16:56:35 +01:00
Juha Niskanen 99db18a995 stm32l4: support flashing L496 devices
Change-Id: I3effc5b675c853433170391c5eaf46edc067b6e7
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4108
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 07:55:43 +01:00
Salvador Arroyo d81fc78d9b mips32, add generic scan 32 function
Will be used later, allow queuing all needed scans in a pracc
access. This makes faster execution with ftdi based adapters
working in sync with pracc.
Added now because the overall code is shorter.

Change-Id: Ib32b89307b75785f88870db8d7c9255dc5bbd426
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4005
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 23:07:29 +01:00
Salvador Arroyo 832f5974f2 mips32, pic32 use uint8_t in 8 bit scan function
Makes code shorter.

Change-Id: I6cc01adffbea063ccb071ddf3a3e3d81727b29ce
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4004
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 23:06:54 +01:00
Byron Kubert e683ff2ac7 Added 512K flashing support for em3587
The Silicon Labs EM3587 and EM3588 may have 512K of flash.
This fix allows for 512K to be specifiied on the command line
when flashing a device.

Change-Id: I18cc4bd0d14e1f2069066734a7396bcccf3de941
Signed-off-by: Byron Kubert <byronk@google.com>
Reviewed-on: http://openocd.zylin.com/3795
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:32:24 +01:00
Hellosun Wu 8f3d16f4ae libusb: Add transfer type filter to get correct ep
The need for this due to AICE having 3 interfaces
(EP1 IN-Interrupt, EP2 OUT-Bulk, EP6 IN-Bulk).
Without it, the function will choose first two endpoint as
read_ep/write_ep. This filter will check transfer types
when get endpoint-id. Without this patch, AICE will not
get correct endpoint.

Change-Id: I4da93c7de41cd19e5095b4bfb42078b21f40b678
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/3218
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:31:41 +01:00
Marc Schink 45f0e6d062 flash/nor/tcl: Make verify_bank parameter optional
Make the 'offset' parameter optional, if omitted simply start at the
beginning of the flash bank.

Additionally, check if the argument is out of bounds of the flash bank.

Change-Id: Id1959eee5c395666c35f26342c3c50134dd564e5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3858
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-24 22:15:14 +01:00
Marc Schink 790a7b2a8d flash/nor/tcl: Fix some format specifiers
Change-Id: I2255aede9713cb7ef538d7433dd900d8da7a51ad
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3857
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:10:19 +01:00
CezaryGapinski e916bcda64 stm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devices
Default values for .first_bank_size_kb and .has_dual_banks fields
described in stm32lx_parts[] do not fully describe
the real device memory layouts.

Basing on:
STM32L0x1 RM0377
STM32L0x2 RM0376
STM32L0x3 RM0367
STM32Lxxxx RM0038

correct values for memory layouts were selected:
id = 0x447 STM32L0xx (Cat.5) <- dual bank flash
for size 192 or 128 KBytes, single bank for 64 KBytes
id = 0x436 STM32L1xx (Cat.4 / Cat.3 - Medium + /
High Density) <- only one size of the bank,
default values are correct
id = 0x437 STM32L1xx (Cat.5 / Cat.6) <- always dual bank,
but size of the bank can be different

For that reason .part_info field in struct stm32lx_flash_bank
is a dynamic field with fields copied from stm32lx_parts[]
and overwriten to correct values
for specific chips and memory sizes.

Change-Id: If638cb0a9916097bfd4eda77d64feaf1ef2d2147
Signed-off-by: Cezary Gapiński <cezary.gapinski@gmail.com>
Reviewed-on: http://openocd.zylin.com/4074
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-04-24 21:56:53 +01:00
Armin van der Togt ca9dcc86d7 Fix flash writing on stm32l0
Fix "couldn't use loader, falling back to page memory writes" error on
stm32l0 which was caused by the use of cortex-m3 instructions in the
flash loader code. The loader is rewritten using cortex-m0 compatible
instructions

Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Change-Id: If23027b8e09f74e45129e1f8452a04bb994c424e
Reviewed-on: http://openocd.zylin.com/4036
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 07:03:59 +01:00
Tomas Vanek 2e0e6c5634 flash/nor/at91samd: fix chip erase of a secured device
'at91samd chip-erase' command did not work on secured device.

Fix it changing address of DSU.CTRL register
(see Atmel SAM D21 datasheet, 13.9. Intellectual Property Protection).

While on it check error return of DSU.CTRL write.

Change-Id: I83155a634a5458cdc0cc16c99c0e155eb1d8b3d6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Thomas Irmen <tirmen@gmx.net>
Reviewed-on: http://openocd.zylin.com/4043
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:31:37 +01:00
Tomas Vanek 44ad4fdcb0 jtag/drivers cmsis-dap: do not limit speed so strictly
Adapter clock frequency is set by 32-bit number and most adapters
limit the highest speed safely. There is no reason to impose strict
limit of 5000 kHz if some adapters can do more.

While on it give informative error message in case of zero adapter_khz.

Change-Id: I45c9804678e24496ea769ea9ca6036701b04dde9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3945
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:28:28 +01:00
Jerome Lambourg 73a9464960 Add support for the ATMEL SAM G55 Xplained Pro board and CPU.
Change-Id: Iffe59dcf9f2cb1f5949c37d11fe0d2141a47f8da
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3922
Tested-by: jenkins
Reviewed-by: Leo Zhang <liang.zhang@microchip.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:25:13 +01:00
Girts 8addd9503e help/log.c: better error handling for "log_output"
* Close previous log file if one was opened before.
* Return error if opening file fails.

Change-Id: I103025cd86bcac785fe39e13bc7d5f79d78e38e7
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3878
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 22:38:42 +01:00
Girts b90d58db07 helper/options.c: fail if unexpected cmdline arguments are present
Previously openocd would silently ignore any incorrect arguments.

Change-Id: Ibb40b57b8a9e07d191215486f3b3c4920a9963c7
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3879
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-23 21:38:41 +01:00
Girts f63af76466 help/options.c: add error handling for -d arg
Fail if we fail to set debug level. Also, clarify in usage string that
-d<n> doesn't accept spaces.

Change-Id: I9ea9945dc068e3e7cfd18b16ffa2a29366d6e4d1
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3880
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-23 21:37:59 +01:00
Damyan Mitev 7829f31a6d nrf51: Add new HWID 0x008F
Add new entry in nrf51_known_devices_table for nRF51822 chip found on
chinese Core51822 dev board. The chp has markings N51822 / QFAAH1 / 1630FW
Nordic Semiconductor nRF51 Series Compatibility matrix confirms that this chip
has 256K Flash and 16K RAM.

Change-Id: I571d15913c6f6e02a6f09c883d7dfc5a66b57c28
Signed-off-by: Damyan Mitev <damyan_mitev@mail.bg>
Reviewed-on: http://openocd.zylin.com/4091
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 21:33:05 +01:00
Tomas Vanek 34eb2933d4 jtag/drivers cmsis-dap: fix speed setting on Atmel EDBG
Without the change Atmel EDBG uses default clock freq about 168 kHz
instead adapter_khz configured before interface init.
Changing adapter speed after init works as expected.

Testing shows the EDBG firmware resets speed to default during DAP_SWJ_Sequence.
Tested with fw versions 03.1F.01AE and 02.09.0169

This change repeats the DAP_SWJ_Clock command after sending a SWJ sequence.

Change-Id: Ic70457c5df635f47cad5e70b0dc83a083ea1b3a3
Reported-by: Ladislav Laska <laska@kam.mff.cuni.cz>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3944
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 21:11:09 +01:00
Joakim Nohlgård 668347e824 flash Kinetis: reduce a flash write message severity to info
There is nothing the user can do if their device does not support sector
programming, there is no reason to have this message at warning level.

Change-Id: Ic9b7386e59b64fece7fbfdc543bdfeeed3eae73d
Signed-off-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-on: http://openocd.zylin.com/4105
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2017-04-23 20:49:22 +01:00
Marc Schink 518fcd3883 target: Fix memory leak
Change-Id: Ib23dfd653d8edacb890a46179e9d437c027d58e8
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4048
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2017-04-23 20:48:45 +01:00
Austin Morton 568e84236b stlink: increase trace buffer size to maximum allowed on st-link v2 firmware
Increasing the trace buffer size on the st-link itself gives openocd a greater
chance of avoiding trace data overflowing within the st-link between polls
when there is a large amount of data being sent over the trace port

The st-link appears to split the given buffer size in half
while one half is awaiting transfer over USB, the other half is being
filled by DMA transfer.  If you do not poll frequently enough, the DMA
transfer will overflow back to the start of its current buffer, resulting in
corrupted output

Buffer size of 4096 bytes is the maximum allowed by the st-link v2

Change-Id: I169189b021c34f8d18de1601d78b8c5890367d68
Signed-off-by: Austin Morton <austinpmorton@gmail.com>
Reviewed-on: http://openocd.zylin.com/4085
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 20:46:32 +01:00
Megan Wachs 3dc066382b Properly consider 'reset halt' and do halt or resume as needed 2017-04-10 12:03:15 -07:00
Megan Wachs 75e7c79b2a fespi: Reset may have occurred. Need to set TXWM again. There are probably more places that need this added. 2017-04-10 12:03:15 -07:00
Megan Wachs b04c6cb3ed riscv: Implement the assert/deassert reset functions for v13 2017-04-10 12:03:15 -07:00
Megan Wachs 14e26040b8 riscv: move value read to after autoexec is cleared. 2017-04-04 16:33:17 -07:00
Megan Wachs 9c1f6ea28b riscv: Correct the autoexec in read_mem 2017-04-04 16:22:55 -07:00
Matthias Welwarsky 332d66c75a aarch64: clear CTI halt event early at debug entry
The halt event was left pending in the CTI, better to clear it immediately
after debug entry.

Change-Id: I6002f862681baf98769e3c73332a7f7f0ef938c1
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4030
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-04-02 16:08:18 +01:00
Megan Wachs eb90a5e05e riscv: Use write-1-to-clear for CMDERR, not write 0 to clear. 2017-03-30 14:27:28 -07:00
Andreas Fritiofson 2804480b09 nrf51: Remove pointer cast
Int may not be 32 bit long.

Change-Id: I420f7efeb484eb35c1d7c20e1575b0b31ed8c9ff
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3930
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-03-29 10:07:41 +01:00
Palmer Dabbelt 7df6804934 Revert "(WIP) Force algorithms to 64 bit"
This reverts commit 466b7b4881.
2017-03-23 19:46:54 -07:00