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9 Commits

Author SHA1 Message Date
Antonio Borneo 38ac08c1c2 tcl: replace the deprecated commands with "adapter ..." 
Avoid annoying "deprecated" messages while running the scripts
distributed with OpenOCD code.
Change automatically created with commands
	sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f)
	sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f)
	sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f)

Minor indentation issue fixed manually in
	tcl/board/at91sam9g20-ek.cfg
	tcl/target/at91sam9260_ext_RAM_ext_flash.cfg

Change-Id: I425fd56c0c88cd6b06124621306eeb89166dfe71
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5284
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
 2020-01-29 06:34:43 +00:00
Paul Fertser d4e195ad1b Remove jtag_rclk from target configs 
Some boards might have RCLK omitted from the JTAG connector and if the
interface claims support for it, OpenOCD will end up trying to use
RCLK while it's actually impossible.

This is a "cd tcl/target; sed -i s/jtag_rclk/adapter_khz/g *" patch.

Change-Id: Iee7337107bc1457966b104389ba9db75a9c860b4
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1695
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
 2013-10-29 22:49:35 +00:00
Uwe Hermann ca45e700b1 target config files: Fix whitespace issues. 
Drop useless double-space occurences, drop trailing whitespace, and fix
some other minor whitespace-related issues.

Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/137
Tested-by: jenkins
 2011-11-07 16:16:33 +00:00
dbrownell 7c7467b34f Add a new JTAG "setup" event; use for better DaVinci ICEpick support. 
The model is that this fires after scanchain verification, when it's
safe to call "jtag tapenable $TAPNAME".  So it will fire as part of
non-error paths of "init" and "reset" command processing.  However it
will *NOT* trigger during "jtag_reset" processing, which skips all
scan chain verification, or after verification errors.

ALSO:
 - switch DaVinci chips to use this new mechanism
 - log TAP activation/deactivation, since their IDCODEs aren't verified
 - unify "enum jtag_event" scripted event notifications
 - remove duplicative JTAG_TAP_EVENT_POST_RESET


git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-10-05 08:20:28 +00:00
dbrownell c6b24fb4f0 Get rid of needless OMAP and Davinci target config options 
so they provide better examples and are easier to maintain.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2797 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-10-05 08:13:00 +00:00
dbrownell 108028112f Ensure that DaVinci chips can't start with a too-fast JTAG clock. 
It can be sped up later, once it's known the PLLs are active.

Note that modern tools from TI all use adaptive clocking; and
that if that's done with OpenOCD, "too fast" is also a non-issue.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-09-21 00:37:58 +00:00
oharboe 42115c0997 David Brownell <david-b@pacbell.net> Update docs to say that "arm7_9 dbgrq enable" is the default 
on ARM9 cores, and update the DaVinci config files so they
no longer explicitly specify it.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2484 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-07-06 21:16:11 +00:00
oharboe 974d5f8391 fix eol native 
git-svn-id: svn://svn.berlios.de/openocd/trunk@2353 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-06-22 19:22:10 +00:00
oharboe 26807d1935 David Brownell <david-b@pacbell.net> target config file for newish DM365 chip. Think of this as 
an improved DM355, integrating much better HD video support,
Ethernet, and other goodies.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2351 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-06-22 17:31:12 +00:00