1. update RISCV_MAX_HARTS to 2^20 according to SPEC
2. remove RISCV_MAX_REGISTERS, it's not used anywhere anymore
3. add parentheses
Change-Id: Iadf0fa1ba3bbe5b9420b8430883e140db87f4f9e
Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
If a target where a software breakpoint was set is not currently
available, but there are other targets in the same SMP group that are
available, then we can use those to remove the software breakpoint.
Change-Id: I9faa427c7b3aee31504e6e6599539e6f29b58d8f
Signed-off-by: Tim Newsome <tim@sifive.com>
STLINK-V3PWR is both a standalone debugger probe compatible with
STLINK-V3 and a source measurement unit (SMU).
Link: http://www.st.com/stlink-v3pwr
This code adds support for the debugger probe functionality.
Change-Id: Ib056e55722528f922c5574bb6fbf77e2f2b2b0c1
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7755
Tested-by: jenkins
To start a ipdbg server one needs to know the tap and the
instruction code to reach the IPDBG-Hub. This instruction is
vendor/family specific. Knowledge which can be provided by the
pld driver.
Change-Id: I13eeb9fee895d65cd48544da4704fcc9b528b869
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7369
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Use configurable virtex pld driver to add support for more
xilinx fpga families.
Change-Id: Iff10c8c511787734fa289bdba15f03131d51e071
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7352
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
According to section 5.6 in the RISC-V debug specification, the previous
way to set triggers was incorrect, as was discussed as part of
https://github.com/riscv/riscv-openocd/issues/870. This commit fixes the
sequence to be in line with the specification as well as adds some comments
to clarify for any future reader as to what is actually done.
Change-Id: Iffc5cc0f866a466a7aaa72a4c53ee95c9080ac9d
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
this functionality allows to query if a target belongs to some smp group
and to dynamically turn on/off smp-specific behavior
Change-Id: I469453d95e7c1640a91bc60d80c854404e508535
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
This patch fixes the handling of errno by setting the sys_errn
only if error has actually occurred during the semihosting call.
It also fixes few issues where error was not set in the first place.
Change-Id: I2fbe562f3ec5e6220b800de04cd33aa1f409c7a0
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
This patch introduces function semihosting_opcode_to_str() which
converts semihosting opcodes to strings. This function is then
used in debug messages to improve log analysis and troubleshooting.
Change-Id: Iffea49dae13d6a626ae0db40d379cba3c9ea5bd3
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7726
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
* rtos/FreeRTOS: solve some conflicting usage of thread id.
1.
There are some RISCV-specific usage of thread_id, which has conflict with upstream.
Some adaptions are made in this patch, to make sure OpenOCD is sending a clear thread list to gdb.
2.
Use freertos_read_struct_value for xSchedulerRunning.
Change-Id: I001a88a0c6d8eac98a389c0217b4897f28124840
Signed-off-by: Chao Du <duchao@eswincomputing.com>
* fix typo.
Change-Id: Id6546cc74de44bbee7e44b7cb29b769a2f35ec4a
* correct the data type.
Change-Id: I28c7e111e569d94ba5f6e1ae21745ddb34d4dd12
* changes as per the review comment.
Change-Id: Ica4c705a8f2657700dc27e24790287ca802480fd
* another macro replacement.
Change-Id: Ia9330fed32d917cf87804051ba1b8d6ac42cfb7b
---------
Signed-off-by: Chao Du <duchao@eswincomputing.com>
With this change, failures to resume a hart due to it not being halted
are more explicitly logged or reported as an error.
Change-Id: Ia55d8df85a908363d0f2140637ce1e47c1ab6251
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This involves halting the target, which might have unintended side
effects, but when the debugger is connected software breakpoints must
trap to the debugger. Anything else is a terrible user experience.
Change-Id: I1f7bb610eeeb054cc3042dc6bcfc16589ce12a31
Signed-off-by: Tim Newsome <tim@sifive.com>
Intended as a place where we can interact with the target without too
much concern about preserving state and doing exactly the right thing
while poll() is going on.
Change-Id: Ic9bd441caae85901a131fd45e742599803df89b5
Signed-off-by: Tim Newsome <tim@sifive.com>
Specifically, call into the RISC-V version when target becomes halted,
running, or unavailable.
I'll be using unavailable shortly.
Change-Id: I9ffffdccbf22e053fe6390d656b362bf9ab9559a
Signed-off-by: Tim Newsome <tim@sifive.com>
Will be used later when we want to do a quick halt/resume.
Change-Id: Ib80166234c4c277b7d9ce26b7566ac0f93017e64
Signed-off-by: Tim Newsome <tim@sifive.com>
* Only set ebreak bits that might be supported based on misa.
* Don't write dcsr if its value wouldn't change.
Change-Id: I7087af0b0df0fbdbf994373b5c887b9b389df872
Signed-off-by: Tim Newsome <tim@sifive.com>
Make it callable earlier, handle `supported` being NULL, and make enum
names more clear.
Change-Id: If4d286b54ccfc01eb5de5a57eb18f748c920e979
Signed-off-by: Tim Newsome <tim@sifive.com>
The riscv013_on_halt function was being called but its implementation was
empty, providing no additional functionality. Removed the function declaration,
calls to it, and its implementation since it is not required.
Change-Id: I425ea890deadeec945f0a47af247f3f99172e801
Signed-off-by: Tim Newsome <tim@sifive.com>
Otherwise I get a compiler warning, which fails the build.
Change-Id: Ib7d4ab85160b537d07c74f8651ac42906fd661ed
Signed-off-by: Tim Newsome <tim@sifive.com>
When halted we don't need to read all 3 instructions before deciding the
sequence doesn't match.
Change-Id: I9f8345960ce27e859265af901a368166a70b9fde
Signed-off-by: Tim Newsome <tim@sifive.com>
* rtos/FreeRTOS: pxCurrentTCB should be used for judgment.
The current TCB is stored in pxCurrentTCB, which is somehow RISC-V-specific, should not be overwritten from upstream (#816).
* fix the code style check.
Signed-off-by: Chao Du <duchao@eswincomputing.com>
Change-Id: I9ffa8947f0cb9e93c7d96866882a5a1e8e69afad
* revert some over-changes in last commit.
Change-Id: Ie88bd75b59190503db11ee4538281bd13b554e50
Signed-off-by: Chao Du <duchao@eswincomputing.com>
---------
Signed-off-by: Chao Du <duchao@eswincomputing.com>
The current cJTAG to JTAG switching commands for TI chips are not
particularly reliable, especially on chips with accurate timing.
On a Raspberry Pi the existing sequence has (depending on cabling and
chip) a ~50% chance of working, on a much better-behaved FT2232H
it doesn't manage to enable full JTAG at all.
This change runs a bunch of test-idle cycles before actually attempting
to switch to full JTAG. This makes the switch reliable even at high
clock speeds (>100kHz) and from precise sources like the FT2232H.
Change-Id: I9293e884bf3e9606d529756ae4483b844d3c39db
Reported-by: Phil Wiggum <p1mail2015@mail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/375/
Signed-off-by: Lorenz Brun <lorenz@brun.one>
Reviewed-on: https://review.openocd.org/c/openocd/+/7419
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The original document from Jedec does not report the entry for
"21 NXP (Philips)", replaced by "c". It's clearly a typo.
Keep the line from JEP106BF.01 for "NXP (Philips)".
Change-Id: I30215c4ff08d5f112305cde6ab7a3176cdcef948
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7727
Tested-by: jenkins
On Windows, isatty() can return any non-zero value if it's an interactive
device. Which diverges from the ARM semihosting specification. This patch
introduces a fix to make the SYS_ISTTY operation conform to spec.
Change-Id: I9bc4f3cb82370812825d52419851910b3e3f35cc
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7725
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
The old implementation of gdb socket error handling
in the gdb_get_char_inner() differs between Windows and *nix
platforms. This patch simplifies it by using an existing
function log_socket_error() which handles most of the platform
specific things. It also provides better error messages.
Change-Id: Iec871c4965b116dc7cfb03c3565bab66c8b41958
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7724
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Added debug prints to show what is the target debug reason. Also added
debug print for Ctrl-C response. This is useful for troubleshooting and
log analysis.
Change-Id: I055936257d989efe7255656198a8d73a367fcd15
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7720
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This patch adds support for the NXP QN908x family of Bluetooth
microcontrollers, such as the QN9080. This chip features a Cortex-M4F
with 512 KiB of flash on all the available versions, although the
documentation suggests that there might be 256 kB versions as well.
The initial support allows to read, erase and write the whole user flash
area. Three new sub-commands under the new "qn908x" command are added
in this patch as well: disable_wdog to disabled the watchdog,
mass_erase to perform a mass erase and allow_brick to allow programming
images that disable the SWD interface.
Disabling the watchdog is required after a "reset halt" in order to run
the CRC algorithm from RAM when verifying the chip. However, this is not
done automatically on probing or other initialization since disabling
the watchdog might interfere with debugging real applications.
The "mass_erase" command allows to erase the whole flash without
probing it, since in some scenarios the chip can be locked such that no
flash or ram can be accessed from the SWD interface, allowing only to
run a mass_erase to be able to flash the program.
The flashing process allows to compute a checksum, similar to the
lpc2000 driver "calc_checksum" but done over a different region of the
memory. This checksum is required to be present for the QN908x
bootloader ROM to boot, and otherwise is useless. As with the lpc2000
design, verification when using "calc_checksum" is expected to fail if
the checksum was not valid in the image being verified.
This was manually tested on a QN9080, including the scan-view,
AddressSanitizer/UBSan and test coverage configurations.
Change-Id: Ibd6d8f3608654294795085fcaaffb448b77cc58b
Co-developed-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: iosabi <iosabi@protonmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5584
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Mark Zhuang
Tim Newsome
Laurent LEMELE
Daniel Anselmi
Marek Vrbka
Parshintsev Anatoly
eolson
Chao Du
Evgeniy Naydanov
Lorenz Brun
Antonio Borneo
iosabi