Commit Graph

31 Commits

Author SHA1 Message Date
Zachary T Welch 0c1bc6703c change #include "arm_adi_v5.h" to <target/arm_adi_v5.h>
Changes from the flat namespace to heirarchical one.  Instead of writing:

	#include "arm_adi_v5.h"

the following form should be used.

	#include <target/arm_adi_v5.h>

The exception is from .c files in the same directory.
2009-12-03 04:24:40 -08:00
David Brownell 1c7d3d200c ARMv7a: move constants out of Cortex-A8 header
These are architecturally defined, not core-specific.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 20:39:58 -08:00
David Brownell 5949a3b3a5 Cortex-A8: remove previous mcr()/mrc() methods
We don't need this code, now that the DPM code handles it.
Neither do we need the ARMv7-A CP15 operations; remove their
remnants too.  And disable a mostly-needless diagnostic.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 00:49:11 -08:00
Zachary T Welch 66ee303456 remove target_type register_command callback
Uses chaining of command_registration structures to eliminate all
target_type register_callback routines.  Exports the command_handler
registration arrays for those target types that are used by others.
2009-11-24 21:37:36 -08:00
David Brownell c008d30fe8 Cortex-A8: implement DPM
This implements the DPM interface for Cortex-A8 cores.  It
also adds a synchronization operation to the DPM framework,
which is needed by the Cortex-A8 after CPSR writes.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-24 21:24:44 -08:00
David Brownell 5706fd7860 ARM: simplify CPSR handling
Stash a pointer to the CPSR in the "struct arm", to help get rid
of the (common) references to its index in the register cache.

This removes almost all references to CPSR offsets outside of the
toplevel ARM code ... except a pair related to the current ARM11
"simulator" logic (which should be removable soonish).

This is a net minor code shrink of a few hundred bytes of object
code, and also makes the code more readable.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-22 03:37:21 -08:00
David Brownell 195ce5eb27 ARMv7-A: use standard ARM core states
We don't want an ARMv7-specific core state enumeration just to
add ThumbEE state.  Update the generic stuff to handle that,
and replace the V7-specific bits with it.

For Cortex-A8:  on debug entry, check both the T and J bits
instead of just the T bit.  When the J bit is set, set the
right state and warn appropriately.

(And while we're at it, move the generic arm struct to the front
of the v7a structure, for somewhat better code generation.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-19 02:33:01 -08:00
David Brownell f320b12289 ARMv7-A: use standard ARM core_mode symbols
The only way ARMv7-A modes differ from ARMv4/ARMv5 flavors
is that v7-A is allowed to include "Secure monitor" support.
That's now handled by our standard top-level ARM code ... so
phase out the stuff that's specific to ARMv7-A.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-19 02:31:34 -08:00
David Brownell f5093e1605 ARM: simplify ARMv7-A register handling
ARMv7-A doesn't need to duplicate all the standard ARM code
for register handling.

 - Switch Cortex-A8 to use the standard register code
 - Remove duplicated infrastructure from ARMv7-A
 - Have ARMv7-A arch_state() show CPSR, like other ARMs

Add comments to show where the Cortex-A8 isn't actually doing
the right thing for register reads/writes, unless core happens
to be in the right mode to start with.  (Looks like maybe there
may be generic confusion between saved/current PSR values in all
the ARM code ...)

Make related ARMv7-A and Cortex-A8 symbols properly static.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-18 14:46:14 -08:00
David Brownell ec93209f51 ARM: add arm_mode_name()
Add and use arm_mode_name() to map from PSR bits to user
meaningful names.   It uses a new table which, later, can
be used to hold other mode-coupled data.

Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8.  The
previous mode name scheme didn't understand that mode.

Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-17 23:50:23 -08:00
David Brownell e722396890 ARMv7-A: no exit() calls
Also, switch integrity check over to the correct magic number,
and remove duplicate v4/v5 #define.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-16 17:58:58 -08:00
David Brownell b695cb7522 #include "target.h" less wildly
Don't include "target.h" from more headers than necessary.  This
avoids needless interdependencies and duplicated include paths.

Don't needlessly include it in source files, either.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-16 00:35:24 -08:00
David Brownell 8193f17c3a target: no implicit #includes of "register.h"
Same deal:  "register.h" got needlessly included all over the
place because of being in a few widely included headers.

So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.

Also, don't need that extra "types.h" inclusion.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-16 00:35:14 -08:00
David Brownell 1186f7efa7 target: less implicit inclusion of "command.h"
Lots of files still include it, often through needless
duplicate inclusion of "log.h"; sigh.

This cleans up the inclusion graph a bunch, so there are
fewer inclusion paths, but it doesn't change much otherwise.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-16 00:35:11 -08:00
Zachary T Welch 98723c4ecd command_context_t -> struct command_context
Remove misleading typedef and redundant suffix from struct command_context.
2009-11-13 13:25:47 -08:00
Zachary T Welch 0f1163e823 target_t -> struct target
Remove misleading typedef and redundant suffix from struct target.
2009-11-13 11:58:14 -08:00
Zachary T Welch af949b2531 armv4_5_common_t -> struct arm
Remove misleading typedef and just use struct arm.
2009-11-13 11:58:13 -08:00
Zachary T Welch 74d09617b9 reg_cache_t -> struct reg_cache
Remove misleading typedef and redundant suffix from struct reg_cache.
2009-11-13 11:58:12 -08:00
Zachary T Welch 2744a031cb armv7a_core_reg_t -> struct armv7a_core_reg
Remove misleading typedef and redundant suffix from struct armv7a_core_reg.
2009-11-13 11:58:10 -08:00
Zachary T Welch 5415d07139 armv7a_algorithm_t -> struct armv7a_algorithm
Remove misleading typedef and redundant suffix from struct armv7a_algorithm.
2009-11-13 11:58:10 -08:00
Zachary T Welch 248448ee3a armv7a_common_t -> struct armv7a_common
Remove misleading typedef and redundant suffix from struct armv7a_common.
2009-11-13 11:58:10 -08:00
Zachary T Welch f6dae0cf84 armv4_5_mmu_common_t -> struct armv4_5_mmu_common
Remove misleading typedef and redundant suffix from struct armv4_5_mmu_common.
2009-11-13 11:58:10 -08:00
Zachary T Welch f96d6054e6 swjdp_common_t -> struct swjdp_common
Remove misleading typedef and redundant suffix from struct swjdp_common.
2009-11-13 11:58:09 -08:00
David Brownell a81df55f39 Cortex-A8: use the new inheritance/nesting scheme
Use target_to_armv7a() etc, replacing needless pointer traversals.
Stop using X->arch_info scheme in most ARMv7-A and Cortex-A8 code.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-05 22:04:13 -08:00
David Brownell db116b1ea3 target: provide container_of()
Provide a cleaner way to handle single inheritance of targets
in C, using the same model Linux does:  structs containing other
structs, un-nested via calls to a "container_of()" macro that
are packaged in typesafe inline functions.

Targets already use this containment idiom, but make it much
more complicated because they un-nest using embedded "void *"
pointers ... in chains of up to five per target, which is all
pure needless complication.  (Example: arm92x core, arm9tdmi,
arm7_9, armv4_5 ... on top of the base "target" class.)

Applying this scheme consistently simplifies things, and gets
rid of many error-prone untyped pointers.  It won't change any
part of the type model though -- it just simplifies things.
(And facilitates more cleanup later on.)

Rule of thumb:  where there's an X->arch_info void* pointer,
access to that pointer can and should be removed.  It may be
convenient to set up pointers to some of the embedded structs;
and shrink their current "*_common" names (annoyingly long).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-05 21:59:39 -08:00
Øyvind Harboe acff2521fb debug interface: get rid of unused pre_debug fn
Removing unused code makes it much less mysterius.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-11-05 09:05:10 +01:00
mlu 6d2473b65b Define debug_base, debug_ap, memory_ap in armv7a_common_t
git-svn-id: svn://svn.berlios.de/openocd/trunk@2714 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-15 16:20:39 +00:00
mlu 7e4f9ac697 Definy symbolic values for VA to PA address translation operations
git-svn-id: svn://svn.berlios.de/openocd/trunk@2712 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-15 15:41:14 +00:00
oharboe e921fead94 Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> Print the value that the method didn't like
git-svn-id: svn://svn.berlios.de/openocd/trunk@2637 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26 19:24:45 +00:00
oharboe 696ed5fdc4 strange.... the code build and links w/Linux GCC target but fails w/arm-elf. The code was clearly broken as it was missing two extern's in the .h file...
git-svn-id: svn://svn.berlios.de/openocd/trunk@2616 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-25 07:17:19 +00:00
oharboe 6f7491c1c1 David Brownell Subset of Cortex-A8 support from Magnus: create an armv7a file
and seed it with DAP access support using the current ADIv5 code.
(With tweaks and cleanup from Øyvind and Dave.)

The ARMv7-AR architecture manual is not publicly available (even
in subset form like the ARMv7-M spec), so it's hard to distinguish
between the Cortex-A8 implementation and the ARMv7-A architecture.

The register set presumably is architectural, and so it's stored
here; it's like earlier ARMs, with small additions.  Ditto the
instruction set, though Thumb2 support is used (extending Thumb
support from ARMv6 with more 32-bit instructions) and there's this
ThumbEE thing too.  There is a new "debug monitor" mode, not yet
fully addressed here, to support debugging in environments (like
motor control) where halting debug mode is inadvisable.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2608 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-25 06:57:26 +00:00