2022-06-12 16:48:05 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2010-12-19 16:39:03 -06:00
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# This is an STM32 eval board with a single STM32F103ZET6 chip.
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# http://www.st.com/internet/evalboard/product/204176.jsp
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2010-05-07 08:24:13 -05:00
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2010-12-19 16:39:04 -06:00
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# increase working area to 32KB for faster flash programming
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set WORKAREASIZE 0x8000
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2008-11-30 16:25:43 -06:00
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2011-07-28 05:45:09 -05:00
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source [find target/stm32f1x.cfg]
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2010-12-08 11:15:42 -06:00
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#
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# configure FSMC Bank 1 (NOR/PSRAM Bank 2) NOR flash
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# M29W128GL70ZA6E
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#
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set _FLASHNAME $_CHIPNAME.norflash
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flash bank $_FLASHNAME cfi 0x64000000 0x01000000 2 2 $_TARGETNAME
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proc stm32_enable_fsmc {} {
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echo "Enabling FSMC Bank 1 (NOR/PSRAM Bank 2)"
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2020-04-25 18:07:27 -05:00
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2010-12-08 11:15:42 -06:00
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# enable gpio (defg) clocks for fsmc
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# RCC_APB2ENR
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mww 0x40021018 0x000001E0
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2020-04-25 18:07:27 -05:00
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2010-12-08 11:15:42 -06:00
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# enable fsmc clock
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# RCC_AHBENR
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mww 0x40021014 0x00000114
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# configure gpio to alternate function
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# GPIOD_CRL
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mww 0x40011400 0x44BB44BB
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# GPIOD_CRH
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mww 0x40011404 0xBBBBBBBB
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2020-04-25 18:07:27 -05:00
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2010-12-08 11:15:42 -06:00
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# GPIOE_CRL
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mww 0x40011800 0xBBBBB444
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# GPIOE_CRH
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mww 0x40011804 0xBBBBBBBB
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2020-04-25 18:07:27 -05:00
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2010-12-08 11:15:42 -06:00
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# GPIOF_CRL
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mww 0x40011C00 0x44BBBBBB
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# GPIOF_CRH
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mww 0x40011C04 0xBBBB4444
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2020-04-25 18:07:27 -05:00
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2010-12-08 11:15:42 -06:00
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# GPIOG_CRL
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mww 0x40012000 0x44BBBBBB
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# GPIOG_CRH
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mww 0x40012004 0x444444B4
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2020-04-25 18:07:27 -05:00
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2010-12-08 11:15:42 -06:00
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# setup fsmc timings
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# FSMC_BCR1
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mww 0xA0000008 0x00001058
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2020-04-25 18:07:27 -05:00
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2010-12-08 11:15:42 -06:00
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# FSMC_BTR1
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mww 0xA000000C 0x10000502
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2020-04-25 18:07:27 -05:00
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2010-12-08 11:15:42 -06:00
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# FSMC_BCR1 - enable fsmc
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mww 0xA0000008 0x00001059
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}
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$_TARGETNAME configure -event reset-init {
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stm32_enable_fsmc
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}
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