2010-12-19 16:39:03 -06:00
|
|
|
# This is an STM32 eval board with a single STM32F103ZET6 chip.
|
|
|
|
|
# http://www.st.com/internet/evalboard/product/204176.jsp
|
2010-05-07 08:24:13 -05:00
|
|
|
|
|
|
|
|
# increase working area for faster flash programming
|
|
|
|
|
|
|
|
|
|
set WORKAREASIZE 32768
|
2008-11-30 16:25:43 -06:00
|
|
|
|
|
|
|
|
source [find target/stm32.cfg]
|
2010-12-08 11:15:42 -06:00
|
|
|
|
|
|
|
|
#
|
|
|
|
|
# configure FSMC Bank 1 (NOR/PSRAM Bank 2) NOR flash
|
|
|
|
|
# M29W128GL70ZA6E
|
|
|
|
|
#
|
|
|
|
|
|
|
|
|
|
set _FLASHNAME $_CHIPNAME.norflash
|
|
|
|
|
flash bank $_FLASHNAME cfi 0x64000000 0x01000000 2 2 $_TARGETNAME
|
|
|
|
|
|
|
|
|
|
proc stm32_enable_fsmc {} {
|
|
|
|
|
|
|
|
|
|
echo "Enabling FSMC Bank 1 (NOR/PSRAM Bank 2)"
|
|
|
|
|
|
|
|
|
|
# enable gpio (defg) clocks for fsmc
|
|
|
|
|
# RCC_APB2ENR
|
|
|
|
|
mww 0x40021018 0x000001E0
|
|
|
|
|
|
|
|
|
|
# enable fsmc clock
|
|
|
|
|
# RCC_AHBENR
|
|
|
|
|
mww 0x40021014 0x00000114
|
|
|
|
|
|
|
|
|
|
# configure gpio to alternate function
|
|
|
|
|
# GPIOD_CRL
|
|
|
|
|
mww 0x40011400 0x44BB44BB
|
|
|
|
|
# GPIOD_CRH
|
|
|
|
|
mww 0x40011404 0xBBBBBBBB
|
|
|
|
|
|
|
|
|
|
# GPIOE_CRL
|
|
|
|
|
mww 0x40011800 0xBBBBB444
|
|
|
|
|
# GPIOE_CRH
|
|
|
|
|
mww 0x40011804 0xBBBBBBBB
|
|
|
|
|
|
|
|
|
|
# GPIOF_CRL
|
|
|
|
|
mww 0x40011C00 0x44BBBBBB
|
|
|
|
|
# GPIOF_CRH
|
|
|
|
|
mww 0x40011C04 0xBBBB4444
|
|
|
|
|
|
|
|
|
|
# GPIOG_CRL
|
|
|
|
|
mww 0x40012000 0x44BBBBBB
|
|
|
|
|
# GPIOG_CRH
|
|
|
|
|
mww 0x40012004 0x444444B4
|
|
|
|
|
|
|
|
|
|
# setup fsmc timings
|
|
|
|
|
# FSMC_BCR1
|
|
|
|
|
mww 0xA0000008 0x00001058
|
|
|
|
|
|
|
|
|
|
# FSMC_BTR1
|
|
|
|
|
mww 0xA000000C 0x10000502
|
|
|
|
|
|
|
|
|
|
# FSMC_BCR1 - enable fsmc
|
|
|
|
|
mww 0xA0000008 0x00001059
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
$_TARGETNAME configure -event reset-init {
|
|
|
|
|
stm32_enable_fsmc
|
|
|
|
|
}
|
