This adds a levels parameter to DUMP, allowing dumping just the
top-level signals, instead of the whole hierarchy. This is helpful for
post-synthesis simulation, where all sub-modules are primitives (with
their inputs and outputs already available at the top level).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
The data yielded by the PMD is not really valid until it has made its
way through the pipeline. Delay it until the data is valid. As a side
effect, this should also eliminate any metastability. This is not
necessary for real hardware, but it allows us to to post-synthesis
simulation (where we can't reach in and probe the internal valid
signal).
Additionally, ensure that the state is known by resetting it when we
don't have a signal.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson