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ethernet
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doc: Add an index page 

Add an index page linking to the rest of the documentation (cuyrrently
just one document).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
This commit is contained in:
Sean Anderson 2023-03-15 14:27:42 -04:00
parent 7d93f91dd3
commit d5717a3053
3 changed files with 13 additions and 3 deletions
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1
Makefile
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@ -169,6 +169,7 @@ doc/output:
doc/output/%.html: doc/%.adoc doc/docinfo.html | doc/output doc/output/%.html: doc/%.adoc doc/docinfo.html | doc/output
$(ADOC) -o $@ $< $(ADOC) -o $@ $<
DOCS += index
DOCS += uart_wb_bridge DOCS += uart_wb_bridge
.PHONY: htmldocs .PHONY: htmldocs

9
README.adoc
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@ -1,11 +1,14 @@
= 100Base-X Ethernet cores = Verilog Ethernet
This repository contains several cores which can be used to implement 100Base-X This repository is home to several cores which can be used to implement 100Base-X
Ethernet PHYs, Hubs (Repeaters) and more. All cores are synchronous and are Ethernet PHYs, Hubs (Repeaters), and more. All cores are synchronous and are
designed to be used in a single 125 MHz clock domain. These cores target Lattice designed to be used in a single 125 MHz clock domain. These cores target Lattice
iCE40 HX FPGAs (in terms of timing), but most modules are not specific to any iCE40 HX FPGAs (in terms of timing), but most modules are not specific to any
FPGA. FPGA.
Refer to https://forty-bot.github.io/ethernet/[documentation site] for further
details.
== Building and testing == Building and testing
The following dependencies are required to build this project. Where known, The following dependencies are required to build this project. Where known,

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doc/index.adoc Normal file
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@ -0,0 +1,6 @@
= Verilog Ethernet Documentation
This is the documentation for my https://github.com/Forty-Bot/ethernet[ethernet
cores].
* xref:uart_wb_bridge.adoc[UART-Wishbone Bridge]