diff --git a/Makefile b/Makefile
index 94ece91..f2af636 100644
--- a/Makefile
+++ b/Makefile
@@ -169,6 +169,7 @@ doc/output:
 doc/output/%.html: doc/%.adoc doc/docinfo.html | doc/output
 	$(ADOC) -o $@ $<
 
+DOCS += index
 DOCS += uart_wb_bridge
 
 .PHONY: htmldocs
diff --git a/README.adoc b/README.adoc
index e30fab0..781a554 100644
--- a/README.adoc
+++ b/README.adoc
@@ -1,11 +1,14 @@
-= 100Base-X Ethernet cores
+= Verilog Ethernet
 
-This repository contains several cores which can be used to implement 100Base-X
-Ethernet PHYs, Hubs (Repeaters) and more. All cores are synchronous and are
+This repository is home to several cores which can be used to implement 100Base-X
+Ethernet PHYs, Hubs (Repeaters), and more. All cores are synchronous and are
 designed to be used in a single 125 MHz clock domain. These cores target Lattice
 iCE40 HX FPGAs (in terms of timing), but most modules are not specific to any
 FPGA.
 
+Refer to https://forty-bot.github.io/ethernet/[documentation site] for further
+details.
+
 == Building and testing
 
 The following dependencies are required to build this project. Where known,
diff --git a/doc/index.adoc b/doc/index.adoc
new file mode 100644
index 0000000..e9975ae
--- /dev/null
+++ b/doc/index.adoc
@@ -0,0 +1,6 @@
+= Verilog Ethernet Documentation
+
+This is the documentation for my https://github.com/Forty-Bot/ethernet[ethernet
+cores].
+
+* xref:uart_wb_bridge.adoc[UART-Wishbone Bridge]