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Ignore post-synthesis verilog 

These files are build artifacts. Ignore them.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
This commit is contained in:
Sean Anderson 2022-08-21 12:36:36 -04:00
parent 1e8b5adc42
commit 799aeb92d6
1 changed files with 1 additions and 0 deletions
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.gitignore vendored
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@ -4,6 +4,7 @@
*.d *.d
*.json *.json
*.asc *.asc
*.post.v
# test artifacts # test artifacts
__pycache__ __pycache__