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yosys/techlibs
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Eddie Hung f03e2c30aa
abc9: replace cell type/parameters if derived type already processed (#2991) 
* Add close bracket

* Add testcase

* Replace cell type/param if in unmap_design

* Improve abc9_box error message too

* Update comment as per review
 		2021-09-09 10:05:55 -07:00
..
achronix Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
anlogic Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
common Add v2 memory cells. 2021-08-11 13:34:10 +02:00
coolrunner2 Blackbox all whiteboxes after synthesis 2021-03-17 21:07:20 +00:00
easic Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
ecp5 abc9: replace cell type/parameters if derived type already processed (#2991) 2021-09-09 10:05:55 -07:00
efinix Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
gowin Gowin: deal with active-low tristate (#2971) 2021-08-20 21:21:06 +02:00
greenpak4 Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
ice40 ice40: Fix typo in SB_CARRY specify for LP/UltraPlus 2021-08-17 14:33:30 +02:00
intel Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
intel_alm Fix files with CRLF line endings 2021-06-09 12:16:33 +02:00
machxo2 Blackbox all whiteboxes after synthesis 2021-03-17 21:07:20 +00:00
nexus Gowin: deal with active-low tristate (#2971) 2021-08-20 21:21:06 +02:00
quicklogic quicklogic: ABC9 synthesis 2021-04-17 20:54:58 +02:00
sf2 Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
xilinx Fixes xc7 BRAM36s 2021-07-30 16:17:22 +02:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00