mirror of https://github.com/YosysHQ/yosys.git
25 lines
1.7 KiB
Makefile
25 lines
1.7 KiB
Makefile
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OBJS += techlibs/intel/synth_intel.o
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$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/m9k_bb.v))
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$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/altpll_bb.v))
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$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_m9k.txt))
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$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_map_m9k.v))
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$(eval $(call add_share_file,share/intel/max10,techlibs/intel/max10/cells_sim.v))
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$(eval $(call add_share_file,share/intel/a10gx,techlibs/intel/a10gx/cells_sim.v))
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$(eval $(call add_share_file,share/intel/cyclonev,techlibs/intel/cyclonev/cells_sim.v))
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$(eval $(call add_share_file,share/intel/cyclone10,techlibs/intel/cyclone10/cells_sim.v))
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$(eval $(call add_share_file,share/intel/cycloneiv,techlibs/intel/cycloneiv/cells_sim.v))
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$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/cells_sim.v))
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$(eval $(call add_share_file,share/intel/max10,techlibs/intel/max10/cells_map.v))
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$(eval $(call add_share_file,share/intel/a10gx,techlibs/intel/a10gx/cells_map.v))
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$(eval $(call add_share_file,share/intel/cyclonev,techlibs/intel/cyclonev/cells_map.v))
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$(eval $(call add_share_file,share/intel/cyclone10,techlibs/intel/cyclone10/cells_map.v))
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$(eval $(call add_share_file,share/intel/cycloneiv,techlibs/intel/cycloneiv/cells_map.v))
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$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/cells_map.v))
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#$(eval $(call add_share_file,share/intel/max10,techlibs/intel/max10/arith_map.v))
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#$(eval $(call add_share_file,share/intel/a10gx,techlibs/intel/a10gx/arith_map.v))
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#$(eval $(call add_share_file,share/intel/cycloneiv,techlibs/intel/cycloneiv/arith_map.v))
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#$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/arith_map.v))
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