yosys/techlibs/microchip
Emil J. Tywoniak 785bd44da7 rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
..
LSRAM.txt changes made to filenames + references 2024-07-04 08:53:41 -07:00
LSRAM_map.v changes made to filenames + references 2024-07-04 08:53:41 -07:00
Makefile.inc fixed typos, build with makefile succeeds 2024-07-04 09:33:58 -07:00
arith_map.v add assertions for synth_microchip tests 2024-07-04 15:45:44 -04:00
brams_defs.vh Add missing u sram init (#3) 2024-07-04 16:39:10 -04:00
cells_map.v changes made to filenames + references 2024-07-04 08:53:41 -07:00
cells_sim.v Revisions (#4) 2024-07-08 10:57:16 -04:00
microchip_dffopt.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
polarfire_dsp_map.v changes made to filenames + references 2024-07-04 08:53:41 -07:00
synth_microchip.cc inline all tests. Add switch to remove init values as PolarFire DFFs do not support init 2024-07-08 17:03:03 -04:00
uSRAM.txt changes made to filenames + references 2024-07-04 08:53:41 -07:00
uSRAM_map.v Add missing u sram init (#3) 2024-07-04 16:39:10 -04:00