yosys/techlibs
David Shah e7dbe7bb3d DSP48E1 sim model: seq test working
Signed-off-by: David Shah <dave@ds0.me>
2019-08-08 10:52:04 +01:00
..
achronix Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
anlogic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
common Trim Y_WIDTH 2019-08-01 14:33:16 -07:00
coolrunner2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
easic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ecp5 Merge remote-tracking branch 'origin/master' into xc7dsp 2019-07-18 20:36:48 -07:00
gowin Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master 2019-04-22 09:09:27 +02:00
greenpak4 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ice40 DSP_MINWIDTH -> DSP_{A,B,Y}_MINWIDTH 2019-08-01 13:20:34 -07:00
intel Merge branch 'ZirconiumX-synth_intel_m9k' 2019-07-25 17:23:48 +02:00
sf2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
xilinx DSP48E1 sim model: seq test working 2019-08-08 10:52:04 +01:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00