Eddie Hung e6d5147214 Merge remote-tracking branch 'origin/master' into eddie/cleanup		2019-08-07 11:11:50 -07:00
..
aiger	RTLIL::S{0,1} -> State::S{0,1}	2019-08-06 16:23:37 -07:00
blif	Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs	2019-08-06 04:47:55 +02:00
btor	Use State::S{0,1}	2019-08-06 16:22:47 -07:00
edif	Add "whitebox" attribute, add "read_verilog -wb"	2019-04-18 17:45:47 +02:00
firrtl	Merge remote-tracking branch 'origin/master' into eddie/cleanup	2019-08-07 11:11:50 -07:00
ilang	Allow attributes on individual switch cases in RTLIL.	2019-07-08 11:34:58 +00:00
intersynth	Add "whitebox" attribute, add "read_verilog -wb"	2019-04-18 17:45:47 +02:00
json	Implement improved JSON attr/param encoding	2019-08-01 12:34:52 +02:00
protobuf	Support filename rewrite in backends	2019-06-18 14:39:52 -07:00
simplec	Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs	2019-08-06 04:47:55 +02:00
smt2	Make liberal use of IdString.in()	2019-08-06 16:18:18 -07:00
smv	Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs	2019-08-06 04:47:55 +02:00
spice	Add "whitebox" attribute, add "read_verilog -wb"	2019-04-18 17:45:47 +02:00
table	Add "whitebox" attribute, add "read_verilog -wb"	2019-04-18 17:45:47 +02:00
verilog	Use State::S{0,1}	2019-08-06 16:22:47 -07:00