yosys/passes
Clifford Wolf e2f6d61c00 Typo fixes in opt_expr and opt_merge 2016-03-31 09:56:56 +02:00
..
cmds Added support for installed plugins 2016-03-30 10:02:03 +02:00
equiv Added "equiv_struct -fwonly" 2016-01-08 10:59:16 +01:00
fsm Added "int ceil_log2(int)" function 2016-02-13 16:52:16 +01:00
hierarchy Cleanup abstract modules at end of "hierarchy -top" 2016-03-21 16:37:35 +01:00
memory Renamed opt_share to opt_merge 2016-03-31 08:52:49 +02:00
opt Typo fixes in opt_expr and opt_merge 2016-03-31 09:56:56 +02:00
proc Improved proc_mux performance for huge always blocks 2015-12-02 22:02:20 +01:00
sat Renamed opt_const to opt_expr 2016-03-31 08:46:56 +02:00
techmap Fixed handling of inverters (aka 1-input luts) in nlutmap 2016-03-23 08:56:08 +01:00
tests Import more std:: stuff into Yosys namespace 2015-10-25 19:30:49 +01:00