yosys/backends
Miodrag Milanović 8180cc4325
Merge pull request #3624 from jix/sim_yw
Changes to support SBY trace generation with the sim command
2023-01-23 16:55:17 +01:00
..
aiger sim: Improvements and fixes for yw cosim 2023-01-11 18:07:16 +01:00
blif Fitting help messages to 80 character width 2022-08-24 10:40:57 +12:00
btor sim/formalff: Clock handling for yw cosim 2023-01-11 18:07:16 +01:00
cxxrtl Add support for GHDL modfloor operator 2022-07-05 15:15:54 -04:00
edif Fitting help messages to 80 character width 2022-08-24 10:40:57 +12:00
firrtl Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
intersynth Intersynth URL 2021-06-09 12:42:52 +02:00
jny Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
json Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
rtlil Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
simplec Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
smt2 sim/formalff: Clock handling for yw cosim 2023-01-11 18:07:16 +01:00
smv Add bwmuxmap pass 2022-11-30 18:50:53 +01:00
spice Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
table Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
verilog Add bwmuxmap pass 2022-11-30 18:50:53 +01:00