riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
yosys/techlibs/xilinx/example_mojo_counter
History
Clifford Wolf d635f8adaa Renamed techlibs/xilinx7 to techlibs/xilinx 2013-10-26 22:29:40 +02:00
..
README Renamed techlibs/xilinx7 to techlibs/xilinx 2013-10-26 22:29:40 +02:00
example.sh Renamed techlibs/xilinx7 to techlibs/xilinx 2013-10-26 22:29:40 +02:00
example.ucf Renamed techlibs/xilinx7 to techlibs/xilinx 2013-10-26 22:29:40 +02:00
example.v Renamed techlibs/xilinx7 to techlibs/xilinx 2013-10-26 22:29:40 +02:00

README 

This is a simple example for Yosys synthesis targeting the Mojo FPGA
development board [1, 2]. Simple script for xst-based synthesis (incl.
generation of reference edif files) and uploading to the board can be
found here [3].

[1] http://embeddedmicro.com/tutorials/mojo
[2] https://www.sparkfun.com/products/11953
[3] http://svn.clifford.at/handicraft/2013/mojo/