yosys/techlibs
Marcin Kościelnicki d48950d92d xilinx: Initial support for LUT4 devices.
Adds support for mapping logic, including LUTs, wide LUTs, and carry
chains.

Fixes #1547
2020-02-07 09:03:22 +01:00
..
achronix Update doc that "-retime" calls abc with "-dff -D 1" 2019-12-30 13:28:29 -08:00
anlogic synth_*: call 'opt -fast' after 'techmap' 2020-02-05 18:39:01 -08:00
common shiftx2mux: fix select out of bounds 2020-02-05 16:41:09 -08:00
coolrunner2 synth_*: call 'opt -fast' after 'techmap' 2020-02-05 18:39:01 -08:00
easic Update doc that "-retime" calls abc with "-dff -D 1" 2019-12-30 13:28:29 -08:00
ecp5 synth_*: call 'opt -fast' after 'techmap' 2020-02-05 18:39:01 -08:00
efinix synth_*: call 'opt -fast' after 'techmap' 2020-02-05 18:39:01 -08:00
gowin Removing cells_sim.v from bram techmap pass 2020-02-06 14:38:29 -06:00
greenpak4 synth_*: call 'opt -fast' after 'techmap' 2020-02-05 18:39:01 -08:00
ice40 synth_*: call 'opt -fast' after 'techmap' 2020-02-05 18:39:01 -08:00
intel Add log_experimental() and experimental() API and "yosys -x" 2020-01-27 18:27:47 +01:00
sf2 synth_*: call 'opt -fast' after 'techmap' 2020-02-05 18:39:01 -08:00
xilinx xilinx: Initial support for LUT4 devices. 2020-02-07 09:03:22 +01:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00