yosys/techlibs
Miodrag Milanovic cf96f41c6d Added bram support 2019-08-04 11:46:36 +02:00
..
achronix Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
anlogic Fix formatting for msys2 mingw build using GetSize 2019-08-01 17:27:34 +02:00
common gen_lut to return correctly sized LUT mask 2019-07-16 12:45:29 -07:00
coolrunner2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
easic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ecp5 synth_ecp5: rename dram to lutram everywhere. 2019-07-16 20:45:12 +00:00
efinix Added bram support 2019-08-04 11:46:36 +02:00
gowin Fix formatting for msys2 mingw build using GetSize 2019-08-01 17:27:34 +02:00
greenpak4 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ice40 ice40: Fix test_dsp_model.sh 2019-07-19 17:33:57 +01:00
intel Merge branch 'ZirconiumX-synth_intel_m9k' 2019-07-25 17:23:48 +02:00
sf2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
xilinx RST -> RSTBRST for RAMB8BWER 2019-07-29 16:05:44 -07:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00