yosys

History

Clifford Wolf 28b3fd05fa SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw()		2014-07-22 20:58:44 +02:00
..
Makefile.inc	btor	2014-01-03 10:52:44 +01:00
README	Added BTOR backend README file	2014-02-05 18:31:10 +01:00
btor.cc	SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw()	2014-07-22 20:58:44 +02:00
btor.ys	modified btor synthesis script for correct use of splice command.	2014-02-12 13:38:28 +01:00
verilog2btor.sh	modified btor synthesis script for correct use of splice command.	2014-02-12 13:38:28 +01:00

README

This is the Yosys BTOR backend.
It is developed by Ahmed Irfan <irfan@fbk.eu> - Fondazione Bruno Kessler, Trento, Italy

Master git repository for the BTOR backend:
https://github.com/ahmedirfan1983/yosys/tree/btor


[[CITE]] BTOR: Bit-Precise Modelling of Word-Level Problems for Model Checking 
Johannes Kepler University, Linz, Austria
http://fmv.jku.at/papers/BrummayerBiereLonsing-BPR08.pdf


Todos:
------

- Add checks for unsupported stuff
    - unsupported cell types
    - async resets
    - etc..

- Add support for $pmux and $lut cells