yosys/frontends/ast
Zachary Snow c18ddbcd82 verilog: impose limit on maximum expression width
Designs with unreasonably wide expressions would previously get stuck
allocating memory forever.
2021-03-04 15:20:52 -05:00
..
Makefile.inc Added Verilog/AST support for DPI functions (dpi_call() still unimplemented) 2014-08-21 12:43:51 +02:00
ast.cc frontend: Make helper functions for printing locations. 2021-02-23 23:51:52 +01:00
ast.h frontend: Make helper functions for printing locations. 2021-02-23 23:51:52 +01:00
dpicall.cc dpi: Support for chandle type 2021-01-23 22:24:31 +00:00
genrtlil.cc verilog: impose limit on maximum expression width 2021-03-04 15:20:52 -05:00
simplify.cc Implement $countones, $isunknown and $onehot{,0} 2021-02-26 12:28:58 -05:00