yosys/passes
Marcelina Kościelnicka c00a29296c sim: Avoid a crash on empty cell connection.
Fixes #2513.
2021-03-08 17:03:31 +01:00
..
cmds scc: Add -specify option to find loops in boxes 2021-01-26 16:23:08 +00:00
equiv use the new isPublic() in a few places 2020-09-14 12:43:18 +02:00
fsm Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
hierarchy Sign extend port connections where necessary 2020-12-18 20:33:14 -07:00
memory memory_dff: Remove code looking for $mux cells. 2021-03-08 16:58:12 +01:00
opt opt_share: Fix X and CO signal width for shifted $alu in opt_share. 2021-01-14 14:54:08 +01:00
pmgen passes/pmgen/pmgen.py: trivial change to remove C++ compiler warnings 2020-12-23 14:38:25 -08:00
proc proc_dff: Fix emitted FF when a register is not assigned in async reset 2021-03-08 17:01:43 +01:00
sat sim: Avoid a crash on empty cell connection. 2021-03-08 17:03:31 +01:00
techmap Replace assert in abc9_ops with more useful error message 2021-03-07 18:52:14 +01:00
tests Replace "ILANG" with "RTLIL" everywhere. 2020-08-26 17:29:32 +00:00