Eddie Hung 7b2bccb3d3 Merge remote-tracking branch 'origin/eddie/clkpart' into xaig_dff		2019-11-23 10:18:06 -08:00
..
Makefile.inc	Move clkpart into passes/hierarchy	2019-11-22 17:25:53 -08:00
clkpart.cc	Print ".en=" only if there is an enable signal	2019-11-23 10:17:31 -08:00
hierarchy.cc	Adopt @cliffordwolf's suggestion	2019-09-03 12:18:50 -07:00
submod.cc	submod to bitty rather bussy, for bussy wires used as input and output	2019-11-22 20:53:58 -08:00
uniquify.cc	Add "whitebox" attribute, add "read_verilog -wb"	2019-04-18 17:45:47 +02:00