yosys/passes
Clifford Wolf 32a91458a7 Added hilomap command 2014-01-19 21:58:58 +01:00
..
abc Fixed use of limited length buffer in ABC blif parser 2013-12-31 21:58:35 +01:00
cmds Improved setundef random number generator 2014-01-18 02:56:36 +01:00
extract Added support for non-const === and !== (for miter circuits) 2013-12-27 14:20:15 +01:00
fsm Fixes in fsm detect/extract for better detection of non-fsm circuits 2013-12-06 12:53:20 +01:00
hierarchy Include unistd.h in passes/hierarchy/hierarchy.cc (required for access(3)) 2014-01-14 20:12:45 +01:00
memory Added automatic memid generation to memory_unpack command 2014-01-17 00:15:15 +01:00
opt Added $assert cell 2014-01-19 14:03:40 +01:00
proc Tiny cleanup in proc_mux.cc 2014-01-03 16:54:59 +01:00
sat Added sat -tempinduc and sat -prove-asserts 2014-01-19 16:35:17 +01:00
scc fixed typos 2013-03-18 07:28:31 +01:00
submod Replaced RTLIL::Const::str with generic decoder method 2013-12-04 14:14:05 +01:00
techmap Added hilomap command 2014-01-19 21:58:58 +01:00