yosys/passes/opt
Clifford Wolf 397b00252d Added $shift and $shiftx cell types (needed for correct part select behavior) 2014-07-29 16:35:13 +02:00
..
Makefile.inc Renamed opt_rmunused to opt_clean 2013-06-05 07:07:31 +02:00
opt.cc Added "opt_const -keepdc" 2014-07-21 21:38:55 +02:00
opt_clean.cc Using log_assert() instead of assert() 2014-07-28 11:27:48 +02:00
opt_const.cc Added $shift and $shiftx cell types (needed for correct part select behavior) 2014-07-29 16:35:13 +02:00
opt_muxtree.cc Using log_assert() instead of assert() 2014-07-28 11:27:48 +02:00
opt_reduce.cc Using log_assert() instead of assert() 2014-07-28 11:27:48 +02:00
opt_rmdff.cc Refactoring: Renamed RTLIL::Design::modules to modules_ 2014-07-27 11:18:30 +02:00
opt_share.cc Using log_assert() instead of assert() 2014-07-28 11:27:48 +02:00
opt_status.h initial import 2013-01-05 11:13:26 +01:00