yosys/techlibs/xilinx
Clifford Wolf 08c13f635c Xilinx RAMB36/RAMB18 memory_bram support complete 2015-01-06 23:54:33 +01:00
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example_mojo_counter Cleanups in xilinx examples 2013-10-27 09:58:53 +01:00
example_sim_counter Fixed xilinx/example_sim_counter test bench 2013-11-24 17:55:46 +01:00
example_zed_counter [EXAMPLES] Ported the mojo counter example to Zynq ZED board. 2013-10-27 21:48:39 +01:00
tests Xilinx RAMB36/RAMB18 memory_bram support complete 2015-01-06 23:54:33 +01:00
Makefile.inc Towards Xilinx bram support 2015-01-04 14:23:30 +01:00
brams.txt Xilinx RAMB36/RAMB18 memory_bram support complete 2015-01-06 23:54:33 +01:00
brams.v Xilinx RAMB36/RAMB18 memory_bram support complete 2015-01-06 23:54:33 +01:00
cells.v Renamed $lut ports to follow A-Y naming scheme 2014-08-15 14:18:40 +02:00
synth_xilinx.cc Various small improvements to synth_xilinx 2015-01-06 14:37:50 +01:00