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riscv
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yosys
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aadca148da
yosys
/
techlibs
History
Andrew Zonenberg
2096a05ec2
Changed order of passes for better handling of INIT attributes on "output reg" FFs
2016-05-04 17:13:54 -07:00
..
common
Added "prep -flatten" and "synth -flatten"
2016-04-24 00:48:33 +02:00
greenpak4
Changed order of passes for better handling of INIT attributes on "output reg" FFs
2016-05-04 17:13:54 -07:00
ice40
Converted synth_greenpak4 to ScriptPass
2016-04-23 10:27:33 +02:00
xilinx
Added "yosys -D" feature
2016-04-21 23:28:37 +02:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00