Clifford Wolf 4d34d031f9 Added "stat" to "synth" and "synth_xilinx"		2015-02-15 13:25:15 +01:00
..
example_basys3	Added Xilinx example for Basys3 board	2015-02-01 17:09:34 +01:00
tests	Various cleanups in xilinx techlib	2015-01-18 19:43:54 +01:00
Makefile.inc	Various cleanups in xilinx techlib	2015-01-18 19:43:54 +01:00
arith_map.v	Various cleanups in xilinx techlib	2015-01-18 19:43:54 +01:00
brams.txt	Various cleanups in xilinx techlib	2015-01-18 19:43:54 +01:00
brams_map.v	Added missing ports and parameters to xilinx brams	2015-02-01 15:42:59 +01:00
cells_map.v	Various cleanups in xilinx techlib	2015-01-18 19:43:54 +01:00
cells_sim.v	Disabled (unused) Xilinx tristate buffers	2015-02-04 16:33:59 +01:00
synth_xilinx.cc	Added "stat" to "synth" and "synth_xilinx"	2015-02-15 13:25:15 +01:00