yosys/frontends/ast
Eddie Hung 4f889b2f57
Merge pull request #1724 from YosysHQ/eddie/abc9_specify
abc9: auto-generate *.lut/*.box files and arrival/required times from specify entries
2020-03-02 12:32:27 -08:00
..
Makefile.inc Added Verilog/AST support for DPI functions (dpi_call() still unimplemented) 2014-08-21 12:43:51 +02:00
ast.cc ast: quiet down when deriving blackbox modules 2020-02-27 10:17:29 -08:00
ast.h ast: quiet down when deriving blackbox modules 2020-02-27 10:17:29 -08:00
dpicall.cc Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
genrtlil.cc ast: fixes #1710; do not generate RTLIL for unreachable ternary 2020-02-27 16:55:55 -08:00
simplify.cc Comment out log() 2020-02-27 16:53:49 -08:00