Eddie Hung 09ee96e8c2 Merge remote-tracking branch 'origin/master' into xaig_dff		2019-11-19 15:40:39 -08:00
..
aiger	Fix merge issues	2019-10-04 17:21:14 -07:00
ast	Use "(id)" instead of "id" for types as temporary hack	2019-10-14 05:24:31 +02:00
blif	Fix parsing of .cname BLIF statements	2019-10-16 09:06:57 +02:00
ilang	Allow attributes on individual switch cases in RTLIL.	2019-07-08 11:34:58 +00:00
json	Update JSON front-end to process new attr/param encoding	2019-08-01 12:48:22 +02:00
liberty	stoi -> atoi	2019-08-07 11:09:17 -07:00
rpc	Fixes for MSVC build	2019-10-04 16:29:46 +02:00
verific	Improve naming scheme for (VHDL) modules imported from Verific	2019-10-24 12:13:50 +02:00
verilog	Add check for valid macro names in macro definitions	2019-11-07 13:30:03 +01:00