This website requires JavaScript.
Explore
Help
Sign In
riscv
/
yosys
mirror of
https://github.com/YosysHQ/yosys.git
Watch
1
Star
0
Fork
You've already forked yosys
0
Code
Issues
Projects
Releases
Wiki
Activity
81de54f436
yosys
/
passes
/
hierarchy
History
Emil J. Tywoniak
785bd44da7
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00
..
Makefile.inc
cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter
2024-07-29 10:26:02 +02:00
hierarchy.cc
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00
keep_hierarchy.cc
cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter
2024-07-29 10:26:02 +02:00
submod.cc
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00
uniquify.cc
Small bugfix in uniquify pass
2022-12-21 10:41:48 +01:00