yosys/backends
Clifford Wolf 1f2548a564
Merge pull request #802 from whitequark/write_verilog_async_mem_ports
write_verilog: correctly emit asynchronous transparent ports
2019-02-12 14:41:34 +01:00
..
aiger Add "write_aiger -I -O -B" 2018-11-12 09:27:33 +01:00
blif Consistent use of 'override' for virtual methods in derived classes. 2018-07-20 23:51:06 -07:00
btor Minor style fixes 2018-12-18 20:02:39 +01:00
edif Add "write_edif -gndvccy" 2019-01-17 13:33:11 +01:00
firrtl added prefix to FDirection constants, fixing windows build 2018-09-21 20:43:49 +02:00
ilang Consistent use of 'override' for virtual methods in derived classes. 2018-07-20 23:51:06 -07:00
intersynth Consistent use of 'override' for virtual methods in derived classes. 2018-07-20 23:51:06 -07:00
json Merge pull request #591 from hzeller/virtual-override 2018-08-15 14:05:38 +02:00
protobuf Consistent use of 'override' for virtual methods in derived classes. 2018-07-20 23:51:06 -07:00
simplec Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
smt2 Add missing blackslash-to-slash convertion to smtio.py (matching Smt2Worker::get_id() behavior) 2019-02-06 16:35:59 +01:00
smv Minor update 2018-10-15 13:54:12 -04:00
spice Consistent use of 'override' for virtual methods in derived classes. 2018-07-20 23:51:06 -07:00
table Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
verilog write_verilog: correctly emit asynchronous transparent ports. 2019-01-29 02:24:00 +00:00