riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Minor update

This commit is contained in:
Aman Goel 2018-10-15 13:54:12 -04:00
parent 90e0938f9a
commit 749b3ed62a
2 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Makefile
View File

@ -1,6 +1,6 @@
# CONFIG := clang
CONFIG := gcc
CONFIG := clang
# CONFIG := gcc
# CONFIG := gcc-4.8
# CONFIG := emcc
# CONFIG := mxe

2
backends/smv/smv.cc
View File

@ -232,7 +232,7 @@ struct SmvWorker
SigSpec sig_a = cell->getPort("\\A");
SigSpec sig_en = cell->getPort("\\EN");
invarspecs.push_back(stringf("(!bool(%s) | bool(%s));", rvalue(sig_en), rvalue(sig_a)));
invarspecs.push_back(stringf("!bool(%s) | bool(%s);", rvalue(sig_en), rvalue(sig_a)));
continue;
}