yosys/passes/memory
Clifford Wolf 28b3fd05fa SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw() 2014-07-22 20:58:44 +02:00
..
Makefile.inc Added memory_share 2014-07-18 13:16:56 +02:00
memory.cc Added translation from read-feedback to en-signals in memory_share 2014-07-18 16:46:40 +02:00
memory_collect.cc SigSpec refactoring: using the accessor functions everywhere 2014-07-22 20:39:37 +02:00
memory_dff.cc SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw() 2014-07-22 20:58:44 +02:00
memory_map.cc SigSpec refactoring: using the accessor functions everywhere 2014-07-22 20:39:37 +02:00
memory_share.cc SigSpec refactoring: using the accessor functions everywhere 2014-07-22 20:39:37 +02:00
memory_unpack.cc Changes to "memory" pass for new $memwr/$mem WR_EN interface 2014-07-16 12:49:50 +02:00