yosys/techlibs
Dan Ravensloft 2e37e62e6b synth_intel_alm: alternative synthesis for Intel FPGAs
By operating at a layer of abstraction over the rather clumsy Intel primitives,
we can avoid special hacks like `dffinit -highlow` in favour of simple techmapping.

This also makes the primitives much easier to manipulate, and more descriptive
(no more cyclonev_lcell_comb to mean anything from a LUT2 to a LUT6).
2020-04-15 11:40:41 +02:00
..
achronix Remove executable flag from files 2020-02-15 10:36:44 +01:00
anlogic kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
common Merge pull request #1648 from YosysHQ/eddie/cmp2lcu 2020-04-03 16:28:25 -07:00
coolrunner2 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
easic Update doc that "-retime" calls abc with "-dff -D 1" 2019-12-30 13:28:29 -08:00
ecp5 Merge pull request #1603 from whitequark/ice40-ram_style 2020-04-10 14:51:01 +00:00
efinix kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
gowin kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
greenpak4 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
ice40 Merge pull request #1603 from whitequark/ice40-ram_style 2020-04-10 14:51:01 +00:00
intel synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00
intel_alm synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00
sf2 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
xilinx Merge pull request #1648 from YosysHQ/eddie/cmp2lcu 2020-04-03 16:28:25 -07:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00