Eddie Hung 6a163b5ddd xilinx_dsp: another typo; move xilinx specific test		2020-01-17 17:07:03 -08:00
..
anlogic	Call equiv_opt with -multiclock and -assert	2019-12-31 18:39:32 -08:00
common	Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram	2019-12-16 21:48:21 -08:00
ecp5	Add #1630 testcase	2020-01-13 21:27:53 -08:00
efinix	Call equiv_opt with -multiclock and -assert	2019-12-31 18:39:32 -08:00
gowin	Call equiv_opt with -multiclock and -assert	2019-12-31 18:39:32 -08:00
ice40	Add #1644 testcase	2020-01-17 15:57:52 -08:00
xilinx	xilinx_dsp: another typo; move xilinx specific test	2020-01-17 17:07:03 -08:00
run-test.sh	Add simcells.v, simlib.v, and some output	2019-06-27 11:13:49 -07:00