Claire Wolf 3c7122c378 Do not optimize away FFs in "prep" and Verific fron-end ... Signed-off-by: Claire Wolf <claire@symbioticeda.com>		2020-06-09 15:54:14 +02:00
..
cmds	Merge pull request #2085 from rswarbrick/select	2020-06-08 15:55:52 +02:00
equiv	kernel: big fat patch to use more ID::*, otherwise ID(*)	2020-04-02 09:51:32 -07:00
fsm	fsm_extract: avoid calling log_signal to determine wire name	2020-06-08 03:49:58 +02:00
hierarchy	Merge pull request #2089 from rswarbrick/modports	2020-06-08 15:48:11 +02:00
memory	Add flooring division operator	2020-05-28 22:59:04 +02:00
opt	Do not optimize away FFs in "prep" and Verific fron-end	2020-06-09 15:54:14 +02:00
pmgen	xilinx: xilinx_dsp_cascade to check CREG for DSP48E1 only	2020-04-22 17:43:25 -07:00
proc	kernel: big fat patch to use more ID::*, otherwise ID(*)	2020-04-02 09:51:32 -07:00
sat	smtbmc and qbfsat: Add timeout option to set solver timeouts for Z3, Yices, and CVC4.	2020-05-25 20:39:30 +00:00
techmap	flatten: accept processes.	2020-06-09 09:56:23 +00:00
tests	Add flooring division operator	2020-05-28 22:59:04 +02:00