.gitignore
|
ecp5: First BRAM type maps successfully
|
2018-10-10 16:35:19 +01:00 |
Makefile.inc
|
ecp5: Add DSP blackboxes
|
2018-10-21 19:27:02 +01:00 |
arith_map.v
|
ecp5: ECP5 synthesis fixes
|
2018-07-16 14:33:13 +02:00 |
bram.txt
|
ecp5: First BRAM type maps successfully
|
2018-10-10 16:35:19 +01:00 |
brams_connect.py
|
ecp5: Script for BRAM IO connections
|
2018-10-10 16:11:00 +01:00 |
brams_init.py
|
ecp5: First BRAM type maps successfully
|
2018-10-10 16:35:19 +01:00 |
brams_map.v
|
ecp5: Disable LSR inversion
|
2018-10-16 12:48:39 +01:00 |
cells_bb.v
|
ecp5: Remove DSP parameters that don't work
|
2018-10-22 16:20:38 +01:00 |
cells_map.v
|
ecp5: Disable LSR inversion
|
2018-10-16 12:48:39 +01:00 |
cells_sim.v
|
ecp5: Sim model fixes
|
2018-10-19 15:16:40 +01:00 |
dram.txt
|
ecp5: Don't map ROMs to DRAM
|
2018-10-01 18:34:41 +01:00 |
drams_map.v
|
ecp5: Adding DRAM map
|
2018-07-13 14:08:42 +02:00 |
latches_map.v
|
ecp5: Add latch inference
|
2018-10-19 15:16:40 +01:00 |
synth_ecp5.cc
|
ecp5: Add DSP blackboxes
|
2018-10-21 19:27:02 +01:00 |