mirror of https://github.com/YosysHQ/yosys.git
ecp5: Sim model fixes
Signed-off-by: David Shah <dave@ds0.me>
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@ -265,16 +265,18 @@ module TRELLIS_IO(
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output O
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);
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parameter DIR = "INPUT";
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reg T_pd;
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always @(*) if (T === 1'bz) T_pd <= 1'b0; else T_pd <= T;
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generate
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if (DIR == "INPUT") begin
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assign B = 1'bz;
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assign O = B;
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end else if (DIR == "OUTPUT") begin
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assign B = T ? 1'bz : I;
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assign B = T_pd ? 1'bz : I;
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assign O = 1'bx;
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end else if (DIR == "INOUT") begin
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assign B = T ? 1'bz : I;
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end else if (DIR == "BIDIR") begin
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assign B = T_pd ? 1'bz : I;
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assign O = B;
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end else begin
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ERROR_UNKNOWN_IO_MODE error();
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