yosys/passes
Eddie Hung 721f6a14fb read_aiger to accept empty string for clk_name, passable only if no latches 2019-02-25 15:34:02 -08:00
..
cmds Hotfix for 4c82ddf 2019-02-21 19:27:23 +01:00
equiv Fix equiv_opt indenting 2018-12-16 15:57:28 +01:00
fsm fsm_opt: Fix runtime error for FSMs without a reset state 2019-02-07 10:35:36 +00:00
hierarchy Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
memory memory_collect: do not truncate 'x from \INIT. 2018-12-21 02:01:27 +00:00
opt Merge pull request #818 from YosysHQ/clifford/dffsrfix 2019-02-21 18:58:44 +01:00
pmgen Fix typo in passes/pmgen/README.md 2019-02-21 18:50:02 +01:00
proc proc_clean: fix critical typo. 2019-01-23 22:08:38 +00:00
sat expose command to not skip 'internal' wires beginning with '$' 2019-02-16 13:45:17 -08:00
techmap read_aiger to accept empty string for clk_name, passable only if no latches 2019-02-25 15:34:02 -08:00
tests flowmap: implement depth relaxation. 2019-01-08 01:13:05 +00:00