yosys/techlibs
Eddie Hung 2e34859a6b Add XC7_WIRE_DELAY macro to synth_xilinx.cc 2019-06-14 11:38:22 -07:00
..
achronix Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
anlogic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
common Make doc consistent 2019-06-14 10:32:46 -07:00
coolrunner2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
easic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ecp5 Comment out dist RAM boxing on ECP5 for now 2019-06-14 10:42:30 -07:00
gowin Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master 2019-04-22 09:09:27 +02:00
greenpak4 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ice40 Remove WIP ABC9 flop support 2019-06-14 10:37:52 -07:00
intel Fix formatting for synth_intel.cc 2019-05-09 08:40:05 -07:00
sf2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
xilinx Add XC7_WIRE_DELAY macro to synth_xilinx.cc 2019-06-14 11:38:22 -07:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00