This website requires JavaScript.
Explore
Help
Sign In
riscv
/
yosys
mirror of
https://github.com/YosysHQ/yosys.git
Watch
1
Star
0
Fork
You've already forked yosys
0
Code
Issues
Projects
Releases
Wiki
Activity
29f8acf095
yosys
/
frontends
History
Clifford Wolf
30396270a2
Increase maximum LUT size in blifparse to 12 bits
2017-09-27 15:27:42 +02:00
..
ast
Fix generation of vlogtb output in yosys-smtbmc for "rand reg" and "rand const reg"
2017-06-07 12:30:24 +02:00
blif
Increase maximum LUT size in blifparse to 12 bits
2017-09-27 15:27:42 +02:00
ilang
Added avail params to ilang format, check module params in 'hierarchy -check'
2016-10-22 11:05:49 +02:00
json
Parse reals as string in JSON front-end
2017-09-26 14:37:03 +02:00
liberty
Added liberty parser support for types within cell decls
2016-09-23 13:53:23 +02:00
verific
Add merging of "past FFs" to verific importer
2017-07-29 00:10:38 +02:00
verilog
Minor coding style fix
2017-09-26 13:50:14 +02:00
vhdl2verilog
Added "yosys -D" feature
2016-04-21 23:28:37 +02:00