Eddie Hung 7d644f40ed Add AREG=2 BREG=2 test		2019-09-11 17:05:47 -07:00
..
.gitignore	Add .gitignore	2019-08-28 09:55:34 -07:00
dsp_simd.ys	Add SIMD test	2019-09-09 21:40:06 -07:00
macc.v	Add AREG=2 BREG=2 test	2019-09-11 17:05:47 -07:00
macc.ys	Extend test for RSTP and RSTM	2019-09-11 09:09:08 -07:00
mul_unsigned.v	Add mul_unsigned test	2019-08-30 14:35:05 -07:00
mul_unsigned.ys	Update test for ffM	2019-08-30 15:01:08 -07:00
pmgen_xilinx_srl.ys	Use test_pmgen for xilinx_srl	2019-08-28 09:55:09 -07:00
run-test.sh	Add xilinx_srl test	2019-08-28 09:24:19 -07:00
xilinx_srl.v	Add xilinx_srl test	2019-08-28 09:24:19 -07:00
xilinx_srl.ys	Do not simplemap for variable test	2019-08-28 09:26:08 -07:00