yosys/passes
Clifford Wolf 7e156a5419 Fixed techmap_wrap for techmap_celltype 2014-09-14 15:34:36 +02:00
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abc Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ $_OAI4_ 2014-08-16 18:29:39 +02:00
cmds Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
fsm Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
hierarchy Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
memory Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
opt Cleanup in wreduce 2014-09-14 10:01:30 +02:00
proc Fixed handling of constant-true branches in proc_clean 2014-08-12 17:35:22 +02:00
sat Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
techmap Fixed techmap_wrap for techmap_celltype 2014-09-14 15:34:36 +02:00
tests Added $lcu cell type 2014-09-08 13:31:04 +02:00