yosys/techlibs
Eddie Hung eb11c06a69 For abc9, run clkpart before ff_map and after abc9 2019-11-23 10:18:22 -08:00
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achronix Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
anlogic make note that it is for latch mode 2019-09-18 17:48:16 +02:00
common Do not map $eq and $ne in cmp2lut, only proper arithmetic cmp 2019-11-11 15:07:29 +01:00
coolrunner2 Fix spacing 2019-08-06 16:47:55 -07:00
easic Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
ecp5 ecp5: Use new autoname pass for better cell/net names 2019-11-15 21:03:11 +00:00
efinix FF should be initialized to 0 2019-10-04 13:27:10 +02:00
gowin gowin: Add missing .gitignore entries 2019-11-22 14:40:36 +01:00
greenpak4 techlibs/greenpak4/cells_map.v: Harmonize whitespace within lut module 2019-02-26 09:40:46 -08:00
ice40 Merge pull request #1490 from YosysHQ/clifford/autoname 2019-11-14 18:03:44 +01:00
intel techlibs/intel: Clean up Makefile 2019-08-05 11:22:11 -07:00
sf2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
xilinx For abc9, run clkpart before ff_map and after abc9 2019-11-23 10:18:22 -08:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00