mirror of https://github.com/YosysHQ/yosys.git
Fix spacing
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parent
c11ad24fd7
commit
e5be9ff871
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@ -61,7 +61,7 @@ struct Coolrunner2SopPass : public Pass {
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for (auto cell : module->selected_cells())
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{
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if (cell->type.in("\\FDCP", "\\FDCP_N", "\\FDDCP", "\\FTCP", "\\FTCP_N", "\\FTDCP",
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"\\FDCPE", "\\FDCPE_N", "\\FDDCPE", "\\LDCP", "\\LDCP_N"))
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"\\FDCPE", "\\FDCPE_N", "\\FDDCPE", "\\LDCP", "\\LDCP_N"))
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{
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if (cell->hasPort("\\PRE"))
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special_pterms_no_inv[sigmap(cell->getPort("\\PRE")[0])].insert(
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@ -256,7 +256,7 @@ struct Coolrunner2SopPass : public Pass {
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for (auto cell : module->selected_cells())
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{
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if (cell->type.in("\\FDCP", "\\FDCP_N", "\\FDDCP", "\\LDCP", "\\LDCP_N",
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"\\FTCP", "\\FTCP_N", "\\FTDCP", "\\FDCPE", "\\FDCPE_N", "\\FDDCPE"))
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"\\FTCP", "\\FTCP_N", "\\FTDCP", "\\FDCPE", "\\FDCPE_N", "\\FDDCPE"))
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{
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auto output = sigmap(cell->getPort("\\Q")[0]);
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sig_fed_by_ff.insert(output);
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@ -267,7 +267,7 @@ struct Coolrunner2SopPass : public Pass {
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for (auto cell : module->selected_cells())
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{
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if (cell->type.in("\\FDCP", "\\FDCP_N", "\\FDDCP", "\\LDCP", "\\LDCP_N",
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"\\FTCP", "\\FTCP_N", "\\FTDCP", "\\FDCPE", "\\FDCPE_N", "\\FDDCPE"))
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"\\FTCP", "\\FTCP_N", "\\FTDCP", "\\FDCPE", "\\FDCPE_N", "\\FDDCPE"))
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{
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SigBit input;
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if (cell->type.in("\\FTCP", "\\FTCP_N", "\\FTDCP"))
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