yosys/passes
Clifford Wolf 218e9051bb Add "synth_ice40 -dsp"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 16:42:27 +01:00
..
cmds Switch "bugpoint" from system() to run_command() 2019-01-07 09:45:21 +01:00
equiv Fix equiv_opt indenting 2018-12-16 15:57:28 +01:00
fsm fsm_opt: Fix runtime error for FSMs without a reset state 2019-02-07 10:35:36 +00:00
hierarchy Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
memory memory_collect: do not truncate 'x from \INIT. 2018-12-21 02:01:27 +00:00
opt Add FF support to wreduce 2019-02-20 16:36:42 +01:00
pmgen Add "synth_ice40 -dsp" 2019-02-20 16:42:27 +01:00
proc proc_clean: fix critical typo. 2019-01-23 22:08:38 +00:00
sat Fixed minor typo in "sim" help message 2018-09-12 18:34:27 -04:00
techmap flowmap: clean up terminology. 2019-01-08 02:05:06 +00:00
tests flowmap: implement depth relaxation. 2019-01-08 01:13:05 +00:00