yosys/frontends/verilog
Clifford Wolf fbd06a1afc Added elsif preproc support 2013-12-18 13:41:36 +01:00
..
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00
Makefile.inc Various improvements in support for generate statements 2013-12-04 21:06:54 +01:00
const2ast.cc Major redesign of expr width/sign detecion (verilog/ast frontend) 2013-07-09 14:31:57 +02:00
lexer.l Enable {* .. *} feature per default (removes dependency to REJECT feature in flex) 2013-11-22 12:46:02 +01:00
parser.y Added AstNode::mkconst_str API 2013-12-05 12:53:49 +01:00
preproc.cc Added elsif preproc support 2013-12-18 13:41:36 +01:00
verilog_frontend.cc Added verilog frontend -ignore_redef option 2013-11-24 19:57:42 +01:00
verilog_frontend.h Enable {* .. *} feature per default (removes dependency to REJECT feature in flex) 2013-11-22 12:46:02 +01:00